# first value for each encoding # ENC_ADD_Z_P_ZZ_ 0x00,0x00,0x00,0x04 = # ENC_SADDV_R_P_Z_ 0x00,0x20,0x00,0x04 = # ENC_MLA_Z_P_ZZZ_ 0x00,0x40,0x00,0x04 = # ENC_MLS_Z_P_ZZZ_ 0x00,0x60,0x00,0x04 = # ENC_ASR_Z_P_ZI_ 0x00,0x80,0x00,0x04 = # ENC_MAD_Z_P_ZZZ_ 0x00,0xC0,0x00,0x04 = # ENC_MSB_Z_P_ZZZ_ 0x00,0xE0,0x00,0x04 = # ENC_SUB_Z_P_ZZ_ 0x00,0x00,0x01,0x04 = # ENC_UADDV_R_P_Z_ 0x00,0x20,0x01,0x04 = # ENC_LSR_Z_P_ZI_ 0x00,0x80,0x01,0x04 = # ENC_SUBR_Z_P_ZZ_ 0x00,0x00,0x03,0x04 = # ENC_LSL_Z_P_ZI_ 0x00,0x80,0x03,0x04 = # ENC_ASRD_Z_P_ZI_ 0x00,0x80,0x04,0x04 = # ENC_SMAX_Z_P_ZZ_ 0x00,0x00,0x08,0x04 = # ENC_SMAXV_R_P_Z_ 0x00,0x20,0x08,0x04 = # ENC_UMAX_Z_P_ZZ_ 0x00,0x00,0x09,0x04 = # ENC_UMAXV_R_P_Z_ 0x00,0x20,0x09,0x04 = # ENC_SMIN_Z_P_ZZ_ 0x00,0x00,0x0A,0x04 = # ENC_SMINV_R_P_Z_ 0x00,0x20,0x0A,0x04 = # ENC_UMIN_Z_P_ZZ_ 0x00,0x00,0x0B,0x04 = # ENC_UMINV_R_P_Z_ 0x00,0x20,0x0B,0x04 = # ENC_SABD_Z_P_ZZ_ 0x00,0x00,0x0C,0x04 = # ENC_UABD_Z_P_ZZ_ 0x00,0x00,0x0D,0x04 = # ENC_MUL_Z_P_ZZ_ 0x00,0x00,0x10,0x04 = # ENC_MOVPRFX_Z_P_Z_ 0x00,0x20,0x10,0x04 = # ENC_ASR_Z_P_ZZ_ 0x00,0x80,0x10,0x04 = # ENC_SXTB_Z_P_Z_ 0x00,0xA0,0x10,0x04 = # ENC_LSR_Z_P_ZZ_ 0x00,0x80,0x11,0x04 = # ENC_UXTB_Z_P_Z_ 0x00,0xA0,0x11,0x04 = # ENC_SMULH_Z_P_ZZ_ 0x00,0x00,0x12,0x04 = # ENC_SXTH_Z_P_Z_ 0x00,0xA0,0x12,0x04 = # ENC_UMULH_Z_P_ZZ_ 0x00,0x00,0x13,0x04 = # ENC_LSL_Z_P_ZZ_ 0x00,0x80,0x13,0x04 = # ENC_UXTH_Z_P_Z_ 0x00,0xA0,0x13,0x04 = # ENC_SDIV_Z_P_ZZ_ 0x00,0x00,0x14,0x04 = # ENC_ASRR_Z_P_ZZ_ 0x00,0x80,0x14,0x04 = # ENC_SXTW_Z_P_Z_ 0x00,0xA0,0x14,0x04 = # ENC_UDIV_Z_P_ZZ_ 0x00,0x00,0x15,0x04 = # ENC_LSRR_Z_P_ZZ_ 0x00,0x80,0x15,0x04 = # ENC_UXTW_Z_P_Z_ 0x00,0xA0,0x15,0x04 = # ENC_SDIVR_Z_P_ZZ_ 0x00,0x00,0x16,0x04 = # ENC_ABS_Z_P_Z_ 0x00,0xA0,0x16,0x04 = # ENC_UDIVR_Z_P_ZZ_ 0x00,0x00,0x17,0x04 = # ENC_LSLR_Z_P_ZZ_ 0x00,0x80,0x17,0x04 = # ENC_NEG_Z_P_Z_ 0x00,0xA0,0x17,0x04 = # ENC_ORR_Z_P_ZZ_ 0x00,0x00,0x18,0x04 = # ENC_ORV_R_P_Z_ 0x00,0x20,0x18,0x04 = # ENC_ASR_Z_P_ZW_ 0x00,0x80,0x18,0x04 = # ENC_CLS_Z_P_Z_ 0x00,0xA0,0x18,0x04 = # ENC_EOR_Z_P_ZZ_ 0x00,0x00,0x19,0x04 = # ENC_EORV_R_P_Z_ 0x00,0x20,0x19,0x04 = # ENC_LSR_Z_P_ZW_ 0x00,0x80,0x19,0x04 = # ENC_CLZ_Z_P_Z_ 0x00,0xA0,0x19,0x04 = # ENC_AND_Z_P_ZZ_ 0x00,0x00,0x1A,0x04 = # ENC_ANDV_R_P_Z_ 0x00,0x20,0x1A,0x04 = # ENC_CNT_Z_P_Z_ 0x00,0xA0,0x1A,0x04 = # ENC_BIC_Z_P_ZZ_ 0x00,0x00,0x1B,0x04 = # ENC_LSL_Z_P_ZW_ 0x00,0x80,0x1B,0x04 = # ENC_CNOT_Z_P_Z_ 0x00,0xA0,0x1B,0x04 = # ENC_FABS_Z_P_Z_ 0x00,0xA0,0x1C,0x04 = # ENC_FNEG_Z_P_Z_ 0x00,0xA0,0x1D,0x04 = # ENC_NOT_Z_P_Z_ 0x00,0xA0,0x1E,0x04 = # ENC_ADD_Z_ZZ_ 0x00,0x00,0x20,0x04 = # ENC_SUB_Z_ZZ_ 0x00,0x04,0x20,0x04 = # ENC_SQADD_Z_ZZ_ 0x00,0x10,0x20,0x04 = # ENC_UQADD_Z_ZZ_ 0x00,0x14,0x20,0x04 = # ENC_SQSUB_Z_ZZ_ 0x00,0x18,0x20,0x04 = # ENC_UQSUB_Z_ZZ_ 0x00,0x1C,0x20,0x04 = # ENC_AND_Z_ZZ_ 0x00,0x30,0x20,0x04 = # ENC_INDEX_Z_II_ 0x00,0x40,0x20,0x04 = # ENC_INDEX_Z_RI_ 0x00,0x44,0x20,0x04 = # ENC_INDEX_Z_IR_ 0x00,0x48,0x20,0x04 = # ENC_INDEX_Z_RR_ 0x00,0x4C,0x20,0x04 = # ENC_ADDVL_R_RI_ 0x00,0x50,0x20,0x04 = # ENC_ASR_Z_ZW_ 0x00,0x80,0x20,0x04 = # ENC_LSR_Z_ZW_ 0x00,0x84,0x20,0x04 = # ENC_LSL_Z_ZW_ 0x00,0x8C,0x20,0x04 = # ENC_ASR_Z_ZI_ 0x00,0x90,0x20,0x04 = # ENC_LSR_Z_ZI_ 0x00,0x94,0x20,0x04 = # ENC_LSL_Z_ZI_ 0x00,0x9C,0x20,0x04 = # ENC_ADR_Z_AZ_D_S32_SCALED 0x00,0xA0,0x20,0x04 = # ENC_FTSSEL_Z_ZZ_ 0x00,0xB0,0x20,0x04 = # ENC_FEXPA_Z_Z_ 0x00,0xB8,0x20,0x04 = # ENC_MOVPRFX_Z_Z_ 0x00,0xBC,0x20,0x04 = # ENC_CNTB_R_S_ 0x00,0xE0,0x20,0x04 = # ENC_SQINCB_R_RS_SX 0x00,0xF0,0x20,0x04 = # ENC_UQINCB_R_RS_UW 0x00,0xF4,0x20,0x04 = # ENC_SQDECB_R_RS_SX 0x00,0xF8,0x20,0x04 = # ENC_UQDECB_R_RS_UW 0x00,0xFC,0x20,0x04 = # ENC_INCB_R_RS_ 0x00,0xE0,0x30,0x04 = # ENC_DECB_R_RS_ 0x00,0xE4,0x30,0x04 = # ENC_SQINCB_R_RS_X 0x00,0xF0,0x30,0x04 = # ENC_UQINCB_R_RS_X 0x00,0xF4,0x30,0x04 = # ENC_SQDECB_R_RS_X 0x00,0xF8,0x30,0x04 = # ENC_UQDECB_R_RS_X 0x00,0xFC,0x30,0x04 = # ENC_MOV_ORR_Z_ZZ_ 0x00,0x30,0x60,0x04 = # ENC_ORR_Z_ZZ_ 0x20,0x30,0x60,0x04 = # ENC_ADDPL_R_RI_ 0x00,0x50,0x60,0x04 = # ENC_ADR_Z_AZ_D_U32_SCALED 0x00,0xA0,0x60,0x04 = # ENC_SQINCH_Z_ZS_ 0x00,0xC0,0x60,0x04 = # ENC_UQINCH_Z_ZS_ 0x00,0xC4,0x60,0x04 = # ENC_SQDECH_Z_ZS_ 0x00,0xC8,0x60,0x04 = # ENC_UQDECH_Z_ZS_ 0x00,0xCC,0x60,0x04 = # ENC_CNTH_R_S_ 0x00,0xE0,0x60,0x04 = # ENC_SQINCH_R_RS_SX 0x00,0xF0,0x60,0x04 = # ENC_UQINCH_R_RS_UW 0x00,0xF4,0x60,0x04 = # ENC_SQDECH_R_RS_SX 0x00,0xF8,0x60,0x04 = # ENC_UQDECH_R_RS_UW 0x00,0xFC,0x60,0x04 = # ENC_INCH_Z_ZS_ 0x00,0xC0,0x70,0x04 = # ENC_DECH_Z_ZS_ 0x00,0xC4,0x70,0x04 = # ENC_INCH_R_RS_ 0x00,0xE0,0x70,0x04 = # ENC_DECH_R_RS_ 0x00,0xE4,0x70,0x04 = # ENC_SQINCH_R_RS_X 0x00,0xF0,0x70,0x04 = # ENC_UQINCH_R_RS_X 0x00,0xF4,0x70,0x04 = # ENC_SQDECH_R_RS_X 0x00,0xF8,0x70,0x04 = # ENC_UQDECH_R_RS_X 0x00,0xFC,0x70,0x04 = # ENC_EOR_Z_ZZ_ 0x00,0x30,0xA0,0x04 = # ENC_ADR_Z_AZ_SD_SAME_SCALED 0x00,0xA0,0xA0,0x04 = # ENC_SQINCW_Z_ZS_ 0x00,0xC0,0xA0,0x04 = # ENC_UQINCW_Z_ZS_ 0x00,0xC4,0xA0,0x04 = # ENC_SQDECW_Z_ZS_ 0x00,0xC8,0xA0,0x04 = # ENC_UQDECW_Z_ZS_ 0x00,0xCC,0xA0,0x04 = # ENC_CNTW_R_S_ 0x00,0xE0,0xA0,0x04 = # ENC_SQINCW_R_RS_SX 0x00,0xF0,0xA0,0x04 = # ENC_UQINCW_R_RS_UW 0x00,0xF4,0xA0,0x04 = # ENC_SQDECW_R_RS_SX 0x00,0xF8,0xA0,0x04 = # ENC_UQDECW_R_RS_UW 0x00,0xFC,0xA0,0x04 = # ENC_INCW_Z_ZS_ 0x00,0xC0,0xB0,0x04 = # ENC_DECW_Z_ZS_ 0x00,0xC4,0xB0,0x04 = # ENC_INCW_R_RS_ 0x00,0xE0,0xB0,0x04 = # ENC_DECW_R_RS_ 0x00,0xE4,0xB0,0x04 = # ENC_SQINCW_R_RS_X 0x00,0xF0,0xB0,0x04 = # ENC_UQINCW_R_RS_X 0x00,0xF4,0xB0,0x04 = # ENC_SQDECW_R_RS_X 0x00,0xF8,0xB0,0x04 = # ENC_UQDECW_R_RS_X 0x00,0xFC,0xB0,0x04 = # ENC_RDVL_R_I_ 0x00,0x50,0xBF,0x04 = # ENC_BIC_Z_ZZ_ 0x00,0x30,0xE0,0x04 = # ENC_SQINCD_Z_ZS_ 0x00,0xC0,0xE0,0x04 = # ENC_UQINCD_Z_ZS_ 0x00,0xC4,0xE0,0x04 = # ENC_SQDECD_Z_ZS_ 0x00,0xC8,0xE0,0x04 = # ENC_UQDECD_Z_ZS_ 0x00,0xCC,0xE0,0x04 = # ENC_CNTD_R_S_ 0x00,0xE0,0xE0,0x04 = # ENC_SQINCD_R_RS_SX 0x00,0xF0,0xE0,0x04 = # ENC_UQINCD_R_RS_UW 0x00,0xF4,0xE0,0x04 = # ENC_SQDECD_R_RS_SX 0x00,0xF8,0xE0,0x04 = # ENC_UQDECD_R_RS_UW 0x00,0xFC,0xE0,0x04 = # ENC_INCD_Z_ZS_ 0x00,0xC0,0xF0,0x04 = # ENC_DECD_Z_ZS_ 0x00,0xC4,0xF0,0x04 = # ENC_INCD_R_RS_ 0x00,0xE0,0xF0,0x04 = # ENC_DECD_R_RS_ 0x00,0xE4,0xF0,0x04 = # ENC_SQINCD_R_RS_X 0x00,0xF0,0xF0,0x04 = # ENC_UQINCD_R_RS_X 0x00,0xF4,0xF0,0x04 = # ENC_SQDECD_R_RS_X 0x00,0xF8,0xF0,0x04 = # ENC_UQDECD_R_RS_X 0x00,0xFC,0xF0,0x04 = # ENC_ORR_Z_ZI_ 0x00,0x00,0x00,0x05 = # ENC_MOV_CPY_Z_O_I_ 0x00,0x00,0x10,0x05 = # ENC_MOV_CPY_Z_P_I_ 0x00,0x40,0x10,0x05 = # ENC_FMOV_FCPY_Z_P_I_ 0x00,0xC0,0x10,0x05 = # ENC_EXT_Z_ZI_DES 0x00,0x00,0x20,0x05 = # ENC_DUP_Z_ZI_ 0x00,0x20,0x20,0x05 = # ENC_TBL_Z_ZZ_1 0x00,0x30,0x20,0x05 = # ENC_MOV_DUP_Z_R_ 0x00,0x38,0x20,0x05 = # ENC_ZIP1_P_PP_ 0x00,0x40,0x20,0x05 = # ENC_ZIP2_P_PP_ 0x00,0x44,0x20,0x05 = # ENC_UZP1_P_PP_ 0x00,0x48,0x20,0x05 = # ENC_UZP2_P_PP_ 0x00,0x4C,0x20,0x05 = # ENC_TRN1_P_PP_ 0x00,0x50,0x20,0x05 = # ENC_TRN2_P_PP_ 0x00,0x54,0x20,0x05 = # ENC_ZIP1_Z_ZZ_ 0x00,0x60,0x20,0x05 = # ENC_ZIP2_Z_ZZ_ 0x00,0x64,0x20,0x05 = # ENC_UZP1_Z_ZZ_ 0x00,0x68,0x20,0x05 = # ENC_UZP2_Z_ZZ_ 0x00,0x6C,0x20,0x05 = # ENC_TRN1_Z_ZZ_ 0x00,0x70,0x20,0x05 = # ENC_TRN2_Z_ZZ_ 0x00,0x74,0x20,0x05 = # ENC_MOV_CPY_Z_P_V_ 0x00,0x80,0x20,0x05 = # ENC_LASTA_R_P_Z_ 0x00,0xA0,0x20,0x05 = # ENC_MOV_SEL_Z_P_ZZ_ 0x00,0xC0,0x20,0x05 = # ENC_SEL_Z_P_ZZ_ 0x01,0xC0,0x20,0x05 = # ENC_MOV_DUP_Z_ZI_ 0x00,0x20,0x21,0x05 = # ENC_COMPACT_Z_P_Z_ 0x00,0x80,0x21,0x05 = # ENC_LASTB_R_P_Z_ 0x00,0xA0,0x21,0x05 = # ENC_LASTA_V_P_Z_ 0x00,0x80,0x22,0x05 = # ENC_MOV_DUP_Z_ZI_2 0x00,0x20,0x23,0x05 = # ENC_LASTB_V_P_Z_ 0x00,0x80,0x23,0x05 = # ENC_INSR_Z_R_ 0x00,0x38,0x24,0x05 = # ENC_REVB_Z_Z_ 0x00,0x80,0x24,0x05 = # ENC_REVH_Z_Z_ 0x00,0x80,0x25,0x05 = # ENC_REVW_Z_Z_ 0x00,0x80,0x26,0x05 = # ENC_RBIT_Z_P_Z_ 0x00,0x80,0x27,0x05 = # ENC_CLASTA_Z_P_ZZ_ 0x00,0x80,0x28,0x05 = # ENC_MOV_CPY_Z_P_R_ 0x00,0xA0,0x28,0x05 = # ENC_CLASTB_Z_P_ZZ_ 0x00,0x80,0x29,0x05 = # ENC_CLASTA_V_P_Z_ 0x00,0x80,0x2A,0x05 = # ENC_CLASTB_V_P_Z_ 0x00,0x80,0x2B,0x05 = # ENC_SPLICE_Z_P_ZZ_DES 0x00,0x80,0x2C,0x05 = # ENC_SUNPKLO_Z_Z_ 0x00,0x38,0x30,0x05 = # ENC_PUNPKLO_P_P_ 0x00,0x40,0x30,0x05 = # ENC_CLASTA_R_P_Z_ 0x00,0xA0,0x30,0x05 = # ENC_SUNPKHI_Z_Z_ 0x00,0x38,0x31,0x05 = # ENC_PUNPKHI_P_P_ 0x00,0x40,0x31,0x05 = # ENC_CLASTB_R_P_Z_ 0x00,0xA0,0x31,0x05 = # ENC_UUNPKLO_Z_Z_ 0x00,0x38,0x32,0x05 = # ENC_UUNPKHI_Z_Z_ 0x00,0x38,0x33,0x05 = # ENC_INSR_Z_V_ 0x00,0x38,0x34,0x05 = # ENC_REV_P_P_ 0x00,0x40,0x34,0x05 = # ENC_REV_Z_Z_ 0x00,0x38,0x38,0x05 = # ENC_EOR_Z_ZI_ 0x00,0x00,0x40,0x05 = # ENC_AND_Z_ZI_ 0x00,0x00,0x80,0x05 = # ENC_ZIP1_Z_ZZ_Q 0x00,0x00,0xA0,0x05 = # ENC_ZIP2_Z_ZZ_Q 0x00,0x04,0xA0,0x05 = # ENC_UZP1_Z_ZZ_Q 0x00,0x08,0xA0,0x05 = # ENC_UZP2_Z_ZZ_Q 0x00,0x0C,0xA0,0x05 = # ENC_TRN1_Z_ZZ_Q 0x00,0x18,0xA0,0x05 = # ENC_TRN2_Z_ZZ_Q 0x00,0x1C,0xA0,0x05 = # ENC_MOV_DUPM_Z_I_ 0x00,0x00,0xC0,0x05 = # ENC_STXRB_SR32_LDSTEXCL 0x00,0x7C,0x00,0x08 = stxrb w0, w0, [x0] # ENC_STLXRB_SR32_LDSTEXCL 0x00,0xFC,0x00,0x08 = stlxrb w0, w0, [x0] # ENC_CASP_CP32_LDSTEXCL 0x00,0x7C,0x20,0x08 = casp w0, w1, w0, w1, [x0] # ENC_CASPL_CP32_LDSTEXCL 0x00,0xFC,0x20,0x08 = caspl w0, w1, w0, w1, [x0] # ENC_LDXRB_LR32_LDSTEXCL 0x00,0x7C,0x5F,0x08 = ldxrb w0, [x0] # ENC_LDAXRB_LR32_LDSTEXCL 0x00,0xFC,0x5F,0x08 = ldaxrb w0, [x0] # ENC_CASPA_CP32_LDSTEXCL 0x00,0x7C,0x60,0x08 = caspa w0, w1, w0, w1, [x0] # ENC_CASPAL_CP32_LDSTEXCL 0x00,0xFC,0x60,0x08 = caspal w0, w1, w0, w1, [x0] # ENC_STLLRB_SL32_LDSTEXCL 0x00,0x7C,0x9F,0x08 = stllrb w0, [x0] # ENC_STLRB_SL32_LDSTEXCL 0x00,0xFC,0x9F,0x08 = stlrb w0, [x0] # ENC_CASB_C32_LDSTEXCL 0x00,0x7C,0xA0,0x08 = casb w0, w0, [x0] # ENC_CASLB_C32_LDSTEXCL 0x00,0xFC,0xA0,0x08 = caslb w0, w0, [x0] # ENC_LDLARB_LR32_LDSTEXCL 0x00,0x7C,0xDF,0x08 = ldlarb w0, [x0] # ENC_LDARB_LR32_LDSTEXCL 0x00,0xFC,0xDF,0x08 = ldarb w0, [x0] # ENC_CASAB_C32_LDSTEXCL 0x00,0x7C,0xE0,0x08 = casab w0, w0, [x0] # ENC_CASALB_C32_LDSTEXCL 0x00,0xFC,0xE0,0x08 = casalb w0, w0, [x0] # ENC_AND_32_LOG_SHIFT 0x00,0x00,0x00,0x0A = and w0, w0, w0 # ENC_BIC_32_LOG_SHIFT 0x00,0x00,0x20,0x0A = bic w0, w0, w0 # ENC_ADD_32_ADDSUB_SHIFT 0x00,0x00,0x00,0x0B = add w0, w0, w0 # ENC_ADD_32_ADDSUB_EXT 0x00,0x00,0x20,0x0B = add w0, w0, w0, uxtb # ENC_ST4_ASISDLSE_R4 0x00,0x00,0x00,0x0C = st4 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0] # ENC_ST1_ASISDLSE_R4_4V 0x00,0x20,0x00,0x0C = st1 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0] # ENC_ST3_ASISDLSE_R3 0x00,0x40,0x00,0x0C = st3 { v0.8b, v1.8b, v2.8b }, [x0] # ENC_ST1_ASISDLSE_R3_3V 0x00,0x60,0x00,0x0C = st1 { v0.8b, v1.8b, v2.8b }, [x0] # ENC_ST1_ASISDLSE_R1_1V 0x00,0x70,0x00,0x0C = st1 { v0.8b }, [x0] # ENC_ST2_ASISDLSE_R2 0x00,0x80,0x00,0x0C = st2 { v0.8b, v1.8b }, [x0] # ENC_ST1_ASISDLSE_R2_2V 0x00,0xA0,0x00,0x0C = st1 { v0.8b, v1.8b }, [x0] # ENC_LD4_ASISDLSE_R4 0x00,0x00,0x40,0x0C = ld4 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0] # ENC_LD1_ASISDLSE_R4_4V 0x00,0x20,0x40,0x0C = ld1 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0] # ENC_LD3_ASISDLSE_R3 0x00,0x40,0x40,0x0C = ld3 { v0.8b, v1.8b, v2.8b }, [x0] # ENC_LD1_ASISDLSE_R3_3V 0x00,0x60,0x40,0x0C = ld1 { v0.8b, v1.8b, v2.8b }, [x0] # ENC_LD1_ASISDLSE_R1_1V 0x00,0x70,0x40,0x0C = ld1 { v0.8b }, [x0] # ENC_LD2_ASISDLSE_R2 0x00,0x80,0x40,0x0C = ld2 { v0.8b, v1.8b }, [x0] # ENC_LD1_ASISDLSE_R2_2V 0x00,0xA0,0x40,0x0C = ld1 { v0.8b, v1.8b }, [x0] # ENC_ST4_ASISDLSEP_R4_R 0x00,0x00,0x80,0x0C = st4 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x0 # ENC_ST1_ASISDLSEP_R4_R4 0x00,0x20,0x80,0x0C = st1 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x0 # ENC_ST3_ASISDLSEP_R3_R 0x00,0x40,0x80,0x0C = st3 { v0.8b, v1.8b, v2.8b }, [x0], x0 # ENC_ST1_ASISDLSEP_R3_R3 0x00,0x60,0x80,0x0C = st1 { v0.8b, v1.8b, v2.8b }, [x0], x0 # ENC_ST1_ASISDLSEP_R1_R1 0x00,0x70,0x80,0x0C = st1 { v0.8b }, [x0], x0 # ENC_ST2_ASISDLSEP_R2_R 0x00,0x80,0x80,0x0C = st2 { v0.8b, v1.8b }, [x0], x0 # ENC_ST1_ASISDLSEP_R2_R2 0x00,0xA0,0x80,0x0C = st1 { v0.8b, v1.8b }, [x0], x0 # ENC_ST4_ASISDLSEP_I4_I 0x00,0x00,0x9F,0x0C = st4 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], #32 # ENC_ST1_ASISDLSEP_I4_I4 0x00,0x20,0x9F,0x0C = st1 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], #32 # ENC_ST3_ASISDLSEP_I3_I 0x00,0x40,0x9F,0x0C = st3 { v0.8b, v1.8b, v2.8b }, [x0], #24 # ENC_ST1_ASISDLSEP_I3_I3 0x00,0x60,0x9F,0x0C = st1 { v0.8b, v1.8b, v2.8b }, [x0], #24 # ENC_ST1_ASISDLSEP_I1_I1 0x00,0x70,0x9F,0x0C = st1 { v0.8b }, [x0], #8 # ENC_ST2_ASISDLSEP_I2_I 0x00,0x80,0x9F,0x0C = st2 { v0.8b, v1.8b }, [x0], #16 # ENC_ST1_ASISDLSEP_I2_I2 0x00,0xA0,0x9F,0x0C = st1 { v0.8b, v1.8b }, [x0], #16 # ENC_LD4_ASISDLSEP_R4_R 0x00,0x00,0xC0,0x0C = ld4 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x0 # ENC_LD1_ASISDLSEP_R4_R4 0x00,0x20,0xC0,0x0C = ld1 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x0 # ENC_LD3_ASISDLSEP_R3_R 0x00,0x40,0xC0,0x0C = ld3 { v0.8b, v1.8b, v2.8b }, [x0], x0 # ENC_LD1_ASISDLSEP_R3_R3 0x00,0x60,0xC0,0x0C = ld1 { v0.8b, v1.8b, v2.8b }, [x0], x0 # ENC_LD1_ASISDLSEP_R1_R1 0x00,0x70,0xC0,0x0C = ld1 { v0.8b }, [x0], x0 # ENC_LD2_ASISDLSEP_R2_R 0x00,0x80,0xC0,0x0C = ld2 { v0.8b, v1.8b }, [x0], x0 # ENC_LD1_ASISDLSEP_R2_R2 0x00,0xA0,0xC0,0x0C = ld1 { v0.8b, v1.8b }, [x0], x0 # ENC_LD4_ASISDLSEP_I4_I 0x00,0x00,0xDF,0x0C = ld4 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], #32 # ENC_LD1_ASISDLSEP_I4_I4 0x00,0x20,0xDF,0x0C = ld1 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], #32 # ENC_LD3_ASISDLSEP_I3_I 0x00,0x40,0xDF,0x0C = ld3 { v0.8b, v1.8b, v2.8b }, [x0], #24 # ENC_LD1_ASISDLSEP_I3_I3 0x00,0x60,0xDF,0x0C = ld1 { v0.8b, v1.8b, v2.8b }, [x0], #24 # ENC_LD1_ASISDLSEP_I1_I1 0x00,0x70,0xDF,0x0C = ld1 { v0.8b }, [x0], #8 # ENC_LD2_ASISDLSEP_I2_I 0x00,0x80,0xDF,0x0C = ld2 { v0.8b, v1.8b }, [x0], #16 # ENC_LD1_ASISDLSEP_I2_I2 0x00,0xA0,0xDF,0x0C = ld1 { v0.8b, v1.8b }, [x0], #16 # ENC_ST1_ASISDLSO_B1_1B 0x00,0x00,0x00,0x0D = st1 { v0.b }[0], [x0] # ENC_ST3_ASISDLSO_B3_3B 0x00,0x20,0x00,0x0D = st3 { v0.b, v1.b, v2.b }[0], [x0] # ENC_ST1_ASISDLSO_H1_1H 0x00,0x40,0x00,0x0D = st1 { v0.h }[0], [x0] # ENC_ST3_ASISDLSO_H3_3H 0x00,0x60,0x00,0x0D = st3 { v0.h, v1.h, v2.h }[0], [x0] # ENC_ST1_ASISDLSO_S1_1S 0x00,0x80,0x00,0x0D = st1 { v0.s }[0], [x0] # ENC_ST1_ASISDLSO_D1_1D 0x00,0x84,0x00,0x0D = st1 { v0.d }[0], [x0] # ENC_ST3_ASISDLSO_S3_3S 0x00,0xA0,0x00,0x0D = st3 { v0.s, v1.s, v2.s }[0], [x0] # ENC_ST3_ASISDLSO_D3_3D 0x00,0xA4,0x00,0x0D = st3 { v0.d, v1.d, v2.d }[0], [x0] # ENC_ST2_ASISDLSO_B2_2B 0x00,0x00,0x20,0x0D = st2 { v0.b, v1.b }[0], [x0] # ENC_ST4_ASISDLSO_B4_4B 0x00,0x20,0x20,0x0D = st4 { v0.b, v1.b, v2.b, v3.b }[0], [x0] # ENC_ST2_ASISDLSO_H2_2H 0x00,0x40,0x20,0x0D = st2 { v0.h, v1.h }[0], [x0] # ENC_ST4_ASISDLSO_H4_4H 0x00,0x60,0x20,0x0D = st4 { v0.h, v1.h, v2.h, v3.h }[0], [x0] # ENC_ST2_ASISDLSO_S2_2S 0x00,0x80,0x20,0x0D = st2 { v0.s, v1.s }[0], [x0] # ENC_ST2_ASISDLSO_D2_2D 0x00,0x84,0x20,0x0D = st2 { v0.d, v1.d }[0], [x0] # ENC_ST4_ASISDLSO_S4_4S 0x00,0xA0,0x20,0x0D = st4 { v0.s, v1.s, v2.s, v3.s }[0], [x0] # ENC_ST4_ASISDLSO_D4_4D 0x00,0xA4,0x20,0x0D = st4 { v0.d, v1.d, v2.d, v3.d }[0], [x0] # ENC_LD1_ASISDLSO_B1_1B 0x00,0x00,0x40,0x0D = ld1 { v0.b }[0], [x0] # ENC_LD3_ASISDLSO_B3_3B 0x00,0x20,0x40,0x0D = ld3 { v0.b, v1.b, v2.b }[0], [x0] # ENC_LD1_ASISDLSO_H1_1H 0x00,0x40,0x40,0x0D = ld1 { v0.h }[0], [x0] # ENC_LD3_ASISDLSO_H3_3H 0x00,0x60,0x40,0x0D = ld3 { v0.h, v1.h, v2.h }[0], [x0] # ENC_LD1_ASISDLSO_S1_1S 0x00,0x80,0x40,0x0D = ld1 { v0.s }[0], [x0] # ENC_LD1_ASISDLSO_D1_1D 0x00,0x84,0x40,0x0D = ld1 { v0.d }[0], [x0] # ENC_LD3_ASISDLSO_S3_3S 0x00,0xA0,0x40,0x0D = ld3 { v0.s, v1.s, v2.s }[0], [x0] # ENC_LD3_ASISDLSO_D3_3D 0x00,0xA4,0x40,0x0D = ld3 { v0.d, v1.d, v2.d }[0], [x0] # ENC_LD1R_ASISDLSO_R1 0x00,0xC0,0x40,0x0D = ld1r { v0.8b }, [x0] # ENC_LD3R_ASISDLSO_R3 0x00,0xE0,0x40,0x0D = ld3r { v0.8b, v1.8b, v2.8b }, [x0] # ENC_LD2_ASISDLSO_B2_2B 0x00,0x00,0x60,0x0D = ld2 { v0.b, v1.b }[0], [x0] # ENC_LD4_ASISDLSO_B4_4B 0x00,0x20,0x60,0x0D = ld4 { v0.b, v1.b, v2.b, v3.b }[0], [x0] # ENC_LD2_ASISDLSO_H2_2H 0x00,0x40,0x60,0x0D = ld2 { v0.h, v1.h }[0], [x0] # ENC_LD4_ASISDLSO_H4_4H 0x00,0x60,0x60,0x0D = ld4 { v0.h, v1.h, v2.h, v3.h }[0], [x0] # ENC_LD2_ASISDLSO_S2_2S 0x00,0x80,0x60,0x0D = ld2 { v0.s, v1.s }[0], [x0] # ENC_LD2_ASISDLSO_D2_2D 0x00,0x84,0x60,0x0D = ld2 { v0.d, v1.d }[0], [x0] # ENC_LD4_ASISDLSO_S4_4S 0x00,0xA0,0x60,0x0D = ld4 { v0.s, v1.s, v2.s, v3.s }[0], [x0] # ENC_LD4_ASISDLSO_D4_4D 0x00,0xA4,0x60,0x0D = ld4 { v0.d, v1.d, v2.d, v3.d }[0], [x0] # ENC_LD2R_ASISDLSO_R2 0x00,0xC0,0x60,0x0D = ld2r { v0.8b, v1.8b }, [x0] # ENC_LD4R_ASISDLSO_R4 0x00,0xE0,0x60,0x0D = ld4r { v0.8b, v1.8b, v2.8b, v3.8b }, [x0] # ENC_ST1_ASISDLSOP_BX1_R1B 0x00,0x00,0x80,0x0D = st1 { v0.b }[0], [x0], x0 # ENC_ST3_ASISDLSOP_BX3_R3B 0x00,0x20,0x80,0x0D = st3 { v0.b, v1.b, v2.b }[0], [x0], x0 # ENC_ST1_ASISDLSOP_HX1_R1H 0x00,0x40,0x80,0x0D = st1 { v0.h }[0], [x0], x0 # ENC_ST3_ASISDLSOP_HX3_R3H 0x00,0x60,0x80,0x0D = st3 { v0.h, v1.h, v2.h }[0], [x0], x0 # ENC_ST1_ASISDLSOP_SX1_R1S 0x00,0x80,0x80,0x0D = st1 { v0.s }[0], [x0], x0 # ENC_ST1_ASISDLSOP_DX1_R1D 0x00,0x84,0x80,0x0D = st1 { v0.d }[0], [x0], x0 # ENC_ST3_ASISDLSOP_SX3_R3S 0x00,0xA0,0x80,0x0D = st3 { v0.s, v1.s, v2.s }[0], [x0], x0 # ENC_ST3_ASISDLSOP_DX3_R3D 0x00,0xA4,0x80,0x0D = st3 { v0.d, v1.d, v2.d }[0], [x0], x0 # ENC_ST1_ASISDLSOP_B1_I1B 0x00,0x00,0x9F,0x0D = st1 { v0.b }[0], [x0], #1 # ENC_ST3_ASISDLSOP_B3_I3B 0x00,0x20,0x9F,0x0D = st3 { v0.b, v1.b, v2.b }[0], [x0], #3 # ENC_ST1_ASISDLSOP_H1_I1H 0x00,0x40,0x9F,0x0D = st1 { v0.h }[0], [x0], #2 # ENC_ST3_ASISDLSOP_H3_I3H 0x00,0x60,0x9F,0x0D = st3 { v0.h, v1.h, v2.h }[0], [x0], #6 # ENC_ST1_ASISDLSOP_S1_I1S 0x00,0x80,0x9F,0x0D = st1 { v0.s }[0], [x0], #4 # ENC_ST1_ASISDLSOP_D1_I1D 0x00,0x84,0x9F,0x0D = st1 { v0.d }[0], [x0], #8 # ENC_ST3_ASISDLSOP_S3_I3S 0x00,0xA0,0x9F,0x0D = st3 { v0.s, v1.s, v2.s }[0], [x0], #12 # ENC_ST3_ASISDLSOP_D3_I3D 0x00,0xA4,0x9F,0x0D = st3 { v0.d, v1.d, v2.d }[0], [x0], #24 # ENC_ST2_ASISDLSOP_BX2_R2B 0x00,0x00,0xA0,0x0D = st2 { v0.b, v1.b }[0], [x0], x0 # ENC_ST4_ASISDLSOP_BX4_R4B 0x00,0x20,0xA0,0x0D = st4 { v0.b, v1.b, v2.b, v3.b }[0], [x0], x0 # ENC_ST2_ASISDLSOP_HX2_R2H 0x00,0x40,0xA0,0x0D = st2 { v0.h, v1.h }[0], [x0], x0 # ENC_ST4_ASISDLSOP_HX4_R4H 0x00,0x60,0xA0,0x0D = st4 { v0.h, v1.h, v2.h, v3.h }[0], [x0], x0 # ENC_ST2_ASISDLSOP_SX2_R2S 0x00,0x80,0xA0,0x0D = st2 { v0.s, v1.s }[0], [x0], x0 # ENC_ST2_ASISDLSOP_DX2_R2D 0x00,0x84,0xA0,0x0D = st2 { v0.d, v1.d }[0], [x0], x0 # ENC_ST4_ASISDLSOP_SX4_R4S 0x00,0xA0,0xA0,0x0D = st4 { v0.s, v1.s, v2.s, v3.s }[0], [x0], x0 # ENC_ST4_ASISDLSOP_DX4_R4D 0x00,0xA4,0xA0,0x0D = st4 { v0.d, v1.d, v2.d, v3.d }[0], [x0], x0 # ENC_ST2_ASISDLSOP_B2_I2B 0x00,0x00,0xBF,0x0D = st2 { v0.b, v1.b }[0], [x0], #2 # ENC_ST4_ASISDLSOP_B4_I4B 0x00,0x20,0xBF,0x0D = st4 { v0.b, v1.b, v2.b, v3.b }[0], [x0], #4 # ENC_ST2_ASISDLSOP_H2_I2H 0x00,0x40,0xBF,0x0D = st2 { v0.h, v1.h }[0], [x0], #4 # ENC_ST4_ASISDLSOP_H4_I4H 0x00,0x60,0xBF,0x0D = st4 { v0.h, v1.h, v2.h, v3.h }[0], [x0], #8 # ENC_ST2_ASISDLSOP_S2_I2S 0x00,0x80,0xBF,0x0D = st2 { v0.s, v1.s }[0], [x0], #8 # ENC_ST2_ASISDLSOP_D2_I2D 0x00,0x84,0xBF,0x0D = st2 { v0.d, v1.d }[0], [x0], #16 # ENC_ST4_ASISDLSOP_S4_I4S 0x00,0xA0,0xBF,0x0D = st4 { v0.s, v1.s, v2.s, v3.s }[0], [x0], #16 # ENC_ST4_ASISDLSOP_D4_I4D 0x00,0xA4,0xBF,0x0D = st4 { v0.d, v1.d, v2.d, v3.d }[0], [x0], #32 # ENC_LD1_ASISDLSOP_BX1_R1B 0x00,0x00,0xC0,0x0D = ld1 { v0.b }[0], [x0], x0 # ENC_LD3_ASISDLSOP_BX3_R3B 0x00,0x20,0xC0,0x0D = ld3 { v0.b, v1.b, v2.b }[0], [x0], x0 # ENC_LD1_ASISDLSOP_HX1_R1H 0x00,0x40,0xC0,0x0D = ld1 { v0.h }[0], [x0], x0 # ENC_LD3_ASISDLSOP_HX3_R3H 0x00,0x60,0xC0,0x0D = ld3 { v0.h, v1.h, v2.h }[0], [x0], x0 # ENC_LD1_ASISDLSOP_SX1_R1S 0x00,0x80,0xC0,0x0D = ld1 { v0.s }[0], [x0], x0 # ENC_LD1_ASISDLSOP_DX1_R1D 0x00,0x84,0xC0,0x0D = ld1 { v0.d }[0], [x0], x0 # ENC_LD3_ASISDLSOP_SX3_R3S 0x00,0xA0,0xC0,0x0D = ld3 { v0.s, v1.s, v2.s }[0], [x0], x0 # ENC_LD3_ASISDLSOP_DX3_R3D 0x00,0xA4,0xC0,0x0D = ld3 { v0.d, v1.d, v2.d }[0], [x0], x0 # ENC_LD1R_ASISDLSOP_RX1_R 0x00,0xC0,0xC0,0x0D = ld1r { v0.8b }, [x0], x0 # ENC_LD3R_ASISDLSOP_RX3_R 0x00,0xE0,0xC0,0x0D = ld3r { v0.8b, v1.8b, v2.8b }, [x0], x0 # ENC_LD1_ASISDLSOP_B1_I1B 0x00,0x00,0xDF,0x0D = ld1 { v0.b }[0], [x0], #1 # ENC_LD3_ASISDLSOP_B3_I3B 0x00,0x20,0xDF,0x0D = ld3 { v0.b, v1.b, v2.b }[0], [x0], #3 # ENC_LD1_ASISDLSOP_H1_I1H 0x00,0x40,0xDF,0x0D = ld1 { v0.h }[0], [x0], #2 # ENC_LD3_ASISDLSOP_H3_I3H 0x00,0x60,0xDF,0x0D = ld3 { v0.h, v1.h, v2.h }[0], [x0], #6 # ENC_LD1_ASISDLSOP_S1_I1S 0x00,0x80,0xDF,0x0D = ld1 { v0.s }[0], [x0], #4 # ENC_LD1_ASISDLSOP_D1_I1D 0x00,0x84,0xDF,0x0D = ld1 { v0.d }[0], [x0], #8 # ENC_LD3_ASISDLSOP_S3_I3S 0x00,0xA0,0xDF,0x0D = ld3 { v0.s, v1.s, v2.s }[0], [x0], #12 # ENC_LD3_ASISDLSOP_D3_I3D 0x00,0xA4,0xDF,0x0D = ld3 { v0.d, v1.d, v2.d }[0], [x0], #24 # ENC_LD1R_ASISDLSOP_R1_I 0x00,0xC0,0xDF,0x0D = ld1r { v0.8b }, [x0], #1 # ENC_LD3R_ASISDLSOP_R3_I 0x00,0xE0,0xDF,0x0D = ld3r { v0.8b, v1.8b, v2.8b }, [x0], #3 # ENC_LD2_ASISDLSOP_BX2_R2B 0x00,0x00,0xE0,0x0D = ld2 { v0.b, v1.b }[0], [x0], x0 # ENC_LD4_ASISDLSOP_BX4_R4B 0x00,0x20,0xE0,0x0D = ld4 { v0.b, v1.b, v2.b, v3.b }[0], [x0], x0 # ENC_LD2_ASISDLSOP_HX2_R2H 0x00,0x40,0xE0,0x0D = ld2 { v0.h, v1.h }[0], [x0], x0 # ENC_LD4_ASISDLSOP_HX4_R4H 0x00,0x60,0xE0,0x0D = ld4 { v0.h, v1.h, v2.h, v3.h }[0], [x0], x0 # ENC_LD2_ASISDLSOP_SX2_R2S 0x00,0x80,0xE0,0x0D = ld2 { v0.s, v1.s }[0], [x0], x0 # ENC_LD2_ASISDLSOP_DX2_R2D 0x00,0x84,0xE0,0x0D = ld2 { v0.d, v1.d }[0], [x0], x0 # ENC_LD4_ASISDLSOP_SX4_R4S 0x00,0xA0,0xE0,0x0D = ld4 { v0.s, v1.s, v2.s, v3.s }[0], [x0], x0 # ENC_LD4_ASISDLSOP_DX4_R4D 0x00,0xA4,0xE0,0x0D = ld4 { v0.d, v1.d, v2.d, v3.d }[0], [x0], x0 # ENC_LD2R_ASISDLSOP_RX2_R 0x00,0xC0,0xE0,0x0D = ld2r { v0.8b, v1.8b }, [x0], x0 # ENC_LD4R_ASISDLSOP_RX4_R 0x00,0xE0,0xE0,0x0D = ld4r { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x0 # ENC_LD2_ASISDLSOP_B2_I2B 0x00,0x00,0xFF,0x0D = ld2 { v0.b, v1.b }[0], [x0], #2 # ENC_LD4_ASISDLSOP_B4_I4B 0x00,0x20,0xFF,0x0D = ld4 { v0.b, v1.b, v2.b, v3.b }[0], [x0], #4 # ENC_LD2_ASISDLSOP_H2_I2H 0x00,0x40,0xFF,0x0D = ld2 { v0.h, v1.h }[0], [x0], #4 # ENC_LD4_ASISDLSOP_H4_I4H 0x00,0x60,0xFF,0x0D = ld4 { v0.h, v1.h, v2.h, v3.h }[0], [x0], #8 # ENC_LD2_ASISDLSOP_S2_I2S 0x00,0x80,0xFF,0x0D = ld2 { v0.s, v1.s }[0], [x0], #8 # ENC_LD2_ASISDLSOP_D2_I2D 0x00,0x84,0xFF,0x0D = ld2 { v0.d, v1.d }[0], [x0], #16 # ENC_LD4_ASISDLSOP_S4_I4S 0x00,0xA0,0xFF,0x0D = ld4 { v0.s, v1.s, v2.s, v3.s }[0], [x0], #16 # ENC_LD4_ASISDLSOP_D4_I4D 0x00,0xA4,0xFF,0x0D = ld4 { v0.d, v1.d, v2.d, v3.d }[0], [x0], #32 # ENC_LD2R_ASISDLSOP_R2_I 0x00,0xC0,0xFF,0x0D = ld2r { v0.8b, v1.8b }, [x0], #2 # ENC_LD4R_ASISDLSOP_R4_I 0x00,0xE0,0xFF,0x0D = ld4r { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], #4 # ENC_TBL_ASIMDTBL_L1_1 0x00,0x00,0x00,0x0E = tbl v0.8b, { v0.16b }, v0.8b # ENC_DUP_ASIMDINS_DV_V 0x00,0x04,0x00,0x0E = tbl v0.8b, { v0.16b }, v0.8b # ENC_DUP_ASIMDINS_DR_R 0x00,0x0C,0x00,0x0E = tbl v0.8b, { v0.16b }, v0.8b # ENC_TBX_ASIMDTBL_L1_1 0x00,0x10,0x00,0x0E = tbx v0.8b, { v0.16b }, v0.8b # ENC_UZP1_ASIMDPERM_ONLY 0x00,0x18,0x00,0x0E = uzp1 v0.8b, v0.8b, v0.8b # ENC_TBL_ASIMDTBL_L2_2 0x00,0x20,0x00,0x0E = tbl v0.8b, { v0.16b, v1.16b }, v0.8b # ENC_TRN1_ASIMDPERM_ONLY 0x00,0x28,0x00,0x0E = trn1 v0.8b, v0.8b, v0.8b # ENC_SMOV_ASIMDINS_W_W 0x00,0x2C,0x00,0x0E = trn1 v0.8b, v0.8b, v0.8b # ENC_TBX_ASIMDTBL_L2_2 0x00,0x30,0x00,0x0E = tbx v0.8b, { v0.16b, v1.16b }, v0.8b # ENC_ZIP1_ASIMDPERM_ONLY 0x00,0x38,0x00,0x0E = zip1 v0.8b, v0.8b, v0.8b # ENC_UMOV_ASIMDINS_W_W 0x00,0x3C,0x00,0x0E = zip1 v0.8b, v0.8b, v0.8b # ENC_TBL_ASIMDTBL_L3_3 0x00,0x40,0x00,0x0E = tbl v0.8b, { v0.16b, v1.16b, v2.16b }, v0.8b # ENC_TBX_ASIMDTBL_L3_3 0x00,0x50,0x00,0x0E = tbx v0.8b, { v0.16b, v1.16b, v2.16b }, v0.8b # ENC_UZP2_ASIMDPERM_ONLY 0x00,0x58,0x00,0x0E = uzp2 v0.8b, v0.8b, v0.8b # ENC_TBL_ASIMDTBL_L4_4 0x00,0x60,0x00,0x0E = tbl v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.8b # ENC_TRN2_ASIMDPERM_ONLY 0x00,0x68,0x00,0x0E = trn2 v0.8b, v0.8b, v0.8b # ENC_TBX_ASIMDTBL_L4_4 0x00,0x70,0x00,0x0E = tbx v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.8b # ENC_ZIP2_ASIMDPERM_ONLY 0x00,0x78,0x00,0x0E = zip2 v0.8b, v0.8b, v0.8b # ENC_SDOT_ASIMDSAME2_D 0x00,0x94,0x00,0x0E = zip2 v0.8b, v0.8b, v0.8b # ENC_MOV_UMOV_ASIMDINS_W_W 0x00,0x3C,0x04,0x0E = mov w0, v0.s[0] # ENC_SADDL_ASIMDDIFF_L 0x00,0x00,0x20,0x0E = saddl v0.8h, v0.8b, v0.8b # ENC_SHADD_ASIMDSAME_ONLY 0x00,0x04,0x20,0x0E = shadd v0.8b, v0.8b, v0.8b # ENC_REV64_ASIMDMISC_R 0x00,0x08,0x20,0x0E = rev64 v0.8b, v0.8b # ENC_SQADD_ASIMDSAME_ONLY 0x00,0x0C,0x20,0x0E = sqadd v0.8b, v0.8b, v0.8b # ENC_SADDW_ASIMDDIFF_W 0x00,0x10,0x20,0x0E = saddw v0.8h, v0.8h, v0.8b # ENC_SRHADD_ASIMDSAME_ONLY 0x00,0x14,0x20,0x0E = srhadd v0.8b, v0.8b, v0.8b # ENC_REV16_ASIMDMISC_R 0x00,0x18,0x20,0x0E = rev16 v0.8b, v0.8b # ENC_AND_ASIMDSAME_ONLY 0x00,0x1C,0x20,0x0E = and v0.8b, v0.8b, v0.8b # ENC_SSUBL_ASIMDDIFF_L 0x00,0x20,0x20,0x0E = ssubl v0.8h, v0.8b, v0.8b # ENC_SHSUB_ASIMDSAME_ONLY 0x00,0x24,0x20,0x0E = shsub v0.8b, v0.8b, v0.8b # ENC_SADDLP_ASIMDMISC_P 0x00,0x28,0x20,0x0E = saddlp v0.4h, v0.8b # ENC_SQSUB_ASIMDSAME_ONLY 0x00,0x2C,0x20,0x0E = sqsub v0.8b, v0.8b, v0.8b # ENC_SSUBW_ASIMDDIFF_W 0x00,0x30,0x20,0x0E = ssubw v0.8h, v0.8h, v0.8b # ENC_CMGT_ASIMDSAME_ONLY 0x00,0x34,0x20,0x0E = cmgt v0.8b, v0.8b, v0.8b # ENC_SUQADD_ASIMDMISC_R 0x00,0x38,0x20,0x0E = suqadd v0.8b, v0.8b # ENC_CMGE_ASIMDSAME_ONLY 0x00,0x3C,0x20,0x0E = cmge v0.8b, v0.8b, v0.8b # ENC_ADDHN_ASIMDDIFF_N 0x00,0x40,0x20,0x0E = addhn v0.8b, v0.8h, v0.8h # ENC_SSHL_ASIMDSAME_ONLY 0x00,0x44,0x20,0x0E = sshl v0.8b, v0.8b, v0.8b # ENC_CLS_ASIMDMISC_R 0x00,0x48,0x20,0x0E = cls v0.8b, v0.8b # ENC_SQSHL_ASIMDSAME_ONLY 0x00,0x4C,0x20,0x0E = sqshl v0.8b, v0.8b, v0.8b # ENC_SABAL_ASIMDDIFF_L 0x00,0x50,0x20,0x0E = sabal v0.8h, v0.8b, v0.8b # ENC_SRSHL_ASIMDSAME_ONLY 0x00,0x54,0x20,0x0E = srshl v0.8b, v0.8b, v0.8b # ENC_CNT_ASIMDMISC_R 0x00,0x58,0x20,0x0E = cnt v0.8b, v0.8b # ENC_SQRSHL_ASIMDSAME_ONLY 0x00,0x5C,0x20,0x0E = sqrshl v0.8b, v0.8b, v0.8b # ENC_SUBHN_ASIMDDIFF_N 0x00,0x60,0x20,0x0E = subhn v0.8b, v0.8h, v0.8h # ENC_SMAX_ASIMDSAME_ONLY 0x00,0x64,0x20,0x0E = smax v0.8b, v0.8b, v0.8b # ENC_SADALP_ASIMDMISC_P 0x00,0x68,0x20,0x0E = sadalp v0.4h, v0.8b # ENC_SMIN_ASIMDSAME_ONLY 0x00,0x6C,0x20,0x0E = smin v0.8b, v0.8b, v0.8b # ENC_SABDL_ASIMDDIFF_L 0x00,0x70,0x20,0x0E = sabdl v0.8h, v0.8b, v0.8b # ENC_SABD_ASIMDSAME_ONLY 0x00,0x74,0x20,0x0E = sabd v0.8b, v0.8b, v0.8b # ENC_SQABS_ASIMDMISC_R 0x00,0x78,0x20,0x0E = sqabs v0.8b, v0.8b # ENC_SABA_ASIMDSAME_ONLY 0x00,0x7C,0x20,0x0E = saba v0.8b, v0.8b, v0.8b # ENC_SMLAL_ASIMDDIFF_L 0x00,0x80,0x20,0x0E = smlal v0.8h, v0.8b, v0.8b # ENC_ADD_ASIMDSAME_ONLY 0x00,0x84,0x20,0x0E = add v0.8b, v0.8b, v0.8b # ENC_CMGT_ASIMDMISC_Z 0x00,0x88,0x20,0x0E = cmgt v0.8b, v0.8b, #0 # ENC_CMTST_ASIMDSAME_ONLY 0x00,0x8C,0x20,0x0E = cmtst v0.8b, v0.8b, v0.8b # ENC_SQDMLAL_ASIMDDIFF_L 0x00,0x90,0x20,0x0E = cmtst v0.8b, v0.8b, v0.8b # ENC_MLA_ASIMDSAME_ONLY 0x00,0x94,0x20,0x0E = mla v0.8b, v0.8b, v0.8b # ENC_CMEQ_ASIMDMISC_Z 0x00,0x98,0x20,0x0E = cmeq v0.8b, v0.8b, #0 # ENC_MUL_ASIMDSAME_ONLY 0x00,0x9C,0x20,0x0E = mul v0.8b, v0.8b, v0.8b # ENC_SMLSL_ASIMDDIFF_L 0x00,0xA0,0x20,0x0E = smlsl v0.8h, v0.8b, v0.8b # ENC_SMAXP_ASIMDSAME_ONLY 0x00,0xA4,0x20,0x0E = smaxp v0.8b, v0.8b, v0.8b # ENC_CMLT_ASIMDMISC_Z 0x00,0xA8,0x20,0x0E = cmlt v0.8b, v0.8b, #0 # ENC_SMINP_ASIMDSAME_ONLY 0x00,0xAC,0x20,0x0E = sminp v0.8b, v0.8b, v0.8b # ENC_SQDMLSL_ASIMDDIFF_L 0x00,0xB0,0x20,0x0E = sminp v0.8b, v0.8b, v0.8b # ENC_SQDMULH_ASIMDSAME_ONLY 0x00,0xB4,0x20,0x0E = sminp v0.8b, v0.8b, v0.8b # ENC_ABS_ASIMDMISC_R 0x00,0xB8,0x20,0x0E = abs v0.8b, v0.8b # ENC_ADDP_ASIMDSAME_ONLY 0x00,0xBC,0x20,0x0E = addp v0.8b, v0.8b, v0.8b # ENC_SMULL_ASIMDDIFF_L 0x00,0xC0,0x20,0x0E = smull v0.8h, v0.8b, v0.8b # ENC_FMAXNM_ASIMDSAME_ONLY 0x00,0xC4,0x20,0x0E = fmaxnm v0.2s, v0.2s, v0.2s # ENC_FMLA_ASIMDSAME_ONLY 0x00,0xCC,0x20,0x0E = fmla v0.2s, v0.2s, v0.2s # ENC_SQDMULL_ASIMDDIFF_L 0x00,0xD0,0x20,0x0E = fmla v0.2s, v0.2s, v0.2s # ENC_FADD_ASIMDSAME_ONLY 0x00,0xD4,0x20,0x0E = fadd v0.2s, v0.2s, v0.2s # ENC_FMULX_ASIMDSAME_ONLY 0x00,0xDC,0x20,0x0E = fmulx v0.2s, v0.2s, v0.2s # ENC_PMULL_ASIMDDIFF_L 0x00,0xE0,0x20,0x0E = pmull v0.8h, v0.8b, v0.8b # ENC_FCMEQ_ASIMDSAME_ONLY 0x00,0xE4,0x20,0x0E = fcmeq v0.2s, v0.2s, v0.2s # ENC_FMLAL_ASIMDSAME_F 0x00,0xEC,0x20,0x0E = fmlal v0.2s, v0.2h, v0.2h # ENC_FMAX_ASIMDSAME_ONLY 0x00,0xF4,0x20,0x0E = fmax v0.2s, v0.2s, v0.2s # ENC_FRECPS_ASIMDSAME_ONLY 0x00,0xFC,0x20,0x0E = frecps v0.2s, v0.2s, v0.2s # ENC_XTN_ASIMDMISC_N 0x00,0x28,0x21,0x0E = xtn v0.8b, v0.8h # ENC_SQXTN_ASIMDMISC_N 0x00,0x48,0x21,0x0E = sqxtn v0.8b, v0.8h # ENC_FCVTN_ASIMDMISC_N 0x00,0x68,0x21,0x0E = fcvtn v0.4h, v0.4s # ENC_FCVTL_ASIMDMISC_L 0x00,0x78,0x21,0x0E = fcvtl v0.4s, v0.4h # ENC_FRINTN_ASIMDMISC_R 0x00,0x88,0x21,0x0E = frintn v0.2s, v0.2s # ENC_FRINTM_ASIMDMISC_R 0x00,0x98,0x21,0x0E = frintm v0.2s, v0.2s # ENC_FCVTNS_ASIMDMISC_R 0x00,0xA8,0x21,0x0E = fcvtns v0.2s, v0.2s # ENC_FCVTMS_ASIMDMISC_R 0x00,0xB8,0x21,0x0E = fcvtms v0.2s, v0.2s # ENC_FCVTAS_ASIMDMISC_R 0x00,0xC8,0x21,0x0E = fcvtas v0.2s, v0.2s # ENC_SCVTF_ASIMDMISC_R 0x00,0xD8,0x21,0x0E = scvtf v0.2s, v0.2s # ENC_FRINT32Z_ASIMDMISC_R 0x00,0xE8,0x21,0x0E = frint32z v0.2s, v0.2s # ENC_FRINT64Z_ASIMDMISC_R 0x00,0xF8,0x21,0x0E = frint64z v0.2s, v0.2s # ENC_SADDLV_ASIMDALL_ONLY 0x00,0x38,0x30,0x0E = saddlv h0, v0.8b # ENC_SMAXV_ASIMDALL_ONLY 0x00,0xA8,0x30,0x0E = smaxv b0, v0.8b # ENC_FMAXNMV_ASIMDALL_ONLY_H 0x00,0xC8,0x30,0x0E = fmaxnmv h0, v0.4h # ENC_FMAXV_ASIMDALL_ONLY_H 0x00,0xF8,0x30,0x0E = fmaxv h0, v0.4h # ENC_SMINV_ASIMDALL_ONLY 0x00,0xA8,0x31,0x0E = sminv b0, v0.8b # ENC_ADDV_ASIMDALL_ONLY 0x00,0xB8,0x31,0x0E = addv b0, v0.8b # ENC_FMAXNM_ASIMDSAMEFP16_ONLY 0x00,0x04,0x40,0x0E = fmaxnm v0.4h, v0.4h, v0.4h # ENC_FMLA_ASIMDSAMEFP16_ONLY 0x00,0x0C,0x40,0x0E = fmla v0.4h, v0.4h, v0.4h # ENC_FADD_ASIMDSAMEFP16_ONLY 0x00,0x14,0x40,0x0E = fadd v0.4h, v0.4h, v0.4h # ENC_FMULX_ASIMDSAMEFP16_ONLY 0x00,0x1C,0x40,0x0E = fmulx v0.4h, v0.4h, v0.4h # ENC_FCMEQ_ASIMDSAMEFP16_ONLY 0x00,0x24,0x40,0x0E = fcmeq v0.4h, v0.4h, v0.4h # ENC_FMAX_ASIMDSAMEFP16_ONLY 0x00,0x34,0x40,0x0E = fmax v0.4h, v0.4h, v0.4h # ENC_FRECPS_ASIMDSAMEFP16_ONLY 0x00,0x3C,0x40,0x0E = frecps v0.4h, v0.4h, v0.4h # ENC_BIC_ASIMDSAME_ONLY 0x00,0x1C,0x60,0x0E = bic v0.8b, v0.8b, v0.8b # ENC_FRINTN_ASIMDMISCFP16_R 0x00,0x88,0x79,0x0E = frintn v0.4h, v0.4h # ENC_FRINTM_ASIMDMISCFP16_R 0x00,0x98,0x79,0x0E = frintm v0.4h, v0.4h # ENC_FCVTNS_ASIMDMISCFP16_R 0x00,0xA8,0x79,0x0E = fcvtns v0.4h, v0.4h # ENC_FCVTMS_ASIMDMISCFP16_R 0x00,0xB8,0x79,0x0E = fcvtms v0.4h, v0.4h # ENC_FCVTAS_ASIMDMISCFP16_R 0x00,0xC8,0x79,0x0E = fcvtas v0.4h, v0.4h # ENC_SCVTF_ASIMDMISCFP16_R 0x00,0xD8,0x79,0x0E = scvtf v0.4h, v0.4h # ENC_USDOT_ASIMDSAME2_D 0x00,0x9C,0x80,0x0E = scvtf v0.4h, v0.4h # ENC_MOV_ORR_ASIMDSAME_ONLY 0x00,0x1C,0xA0,0x0E = mov v0.8b, v0.8b # ENC_ORR_ASIMDSAME_ONLY 0x20,0x1C,0xA0,0x0E = orr v0.8b, v1.8b, v0.8b # ENC_FMINNM_ASIMDSAME_ONLY 0x00,0xC4,0xA0,0x0E = fminnm v0.2s, v0.2s, v0.2s # ENC_FCMGT_ASIMDMISC_FZ 0x00,0xC8,0xA0,0x0E = fcmgt v0.2s, v0.2s, #0.0 # ENC_FMLS_ASIMDSAME_ONLY 0x00,0xCC,0xA0,0x0E = fmls v0.2s, v0.2s, v0.2s # ENC_FSUB_ASIMDSAME_ONLY 0x00,0xD4,0xA0,0x0E = fsub v0.2s, v0.2s, v0.2s # ENC_FCMEQ_ASIMDMISC_FZ 0x00,0xD8,0xA0,0x0E = fcmeq v0.2s, v0.2s, #0.0 # ENC_FCMLT_ASIMDMISC_FZ 0x00,0xE8,0xA0,0x0E = fcmlt v0.2s, v0.2s, #0.0 # ENC_FMLSL_ASIMDSAME_F 0x00,0xEC,0xA0,0x0E = fmlsl v0.2s, v0.2h, v0.2h # ENC_FMIN_ASIMDSAME_ONLY 0x00,0xF4,0xA0,0x0E = fmin v0.2s, v0.2s, v0.2s # ENC_FABS_ASIMDMISC_R 0x00,0xF8,0xA0,0x0E = fabs v0.2s, v0.2s # ENC_FRSQRTS_ASIMDSAME_ONLY 0x00,0xFC,0xA0,0x0E = frsqrts v0.2s, v0.2s, v0.2s # ENC_BFCVTN_ASIMDMISC_4S 0x00,0x68,0xA1,0x0E = frsqrts v0.2s, v0.2s, v0.2s # ENC_FRINTP_ASIMDMISC_R 0x00,0x88,0xA1,0x0E = frintp v0.2s, v0.2s # ENC_FRINTZ_ASIMDMISC_R 0x00,0x98,0xA1,0x0E = frintz v0.2s, v0.2s # ENC_FCVTPS_ASIMDMISC_R 0x00,0xA8,0xA1,0x0E = fcvtps v0.2s, v0.2s # ENC_FCVTZS_ASIMDMISC_R 0x00,0xB8,0xA1,0x0E = fcvtzs v0.2s, v0.2s # ENC_URECPE_ASIMDMISC_R 0x00,0xC8,0xA1,0x0E = urecpe v0.2s, v0.2s # ENC_FRECPE_ASIMDMISC_R 0x00,0xD8,0xA1,0x0E = frecpe v0.2s, v0.2s # ENC_FMINNMV_ASIMDALL_ONLY_H 0x00,0xC8,0xB0,0x0E = fminnmv h0, v0.4h # ENC_FMINV_ASIMDALL_ONLY_H 0x00,0xF8,0xB0,0x0E = fminv h0, v0.4h # ENC_FMINNM_ASIMDSAMEFP16_ONLY 0x00,0x04,0xC0,0x0E = fminnm v0.4h, v0.4h, v0.4h # ENC_FMLS_ASIMDSAMEFP16_ONLY 0x00,0x0C,0xC0,0x0E = fmls v0.4h, v0.4h, v0.4h # ENC_FSUB_ASIMDSAMEFP16_ONLY 0x00,0x14,0xC0,0x0E = fsub v0.4h, v0.4h, v0.4h # ENC_FMIN_ASIMDSAMEFP16_ONLY 0x00,0x34,0xC0,0x0E = fmin v0.4h, v0.4h, v0.4h # ENC_FRSQRTS_ASIMDSAMEFP16_ONLY 0x00,0x3C,0xC0,0x0E = frsqrts v0.4h, v0.4h, v0.4h # ENC_ORN_ASIMDSAME_ONLY 0x00,0x1C,0xE0,0x0E = orn v0.8b, v0.8b, v0.8b # ENC_FCMGT_ASIMDMISCFP16_FZ 0x00,0xC8,0xF8,0x0E = fcmgt v0.4h, v0.4h, #0.0 # ENC_FCMEQ_ASIMDMISCFP16_FZ 0x00,0xD8,0xF8,0x0E = fcmeq v0.4h, v0.4h, #0.0 # ENC_FCMLT_ASIMDMISCFP16_FZ 0x00,0xE8,0xF8,0x0E = fcmlt v0.4h, v0.4h, #0.0 # ENC_FABS_ASIMDMISCFP16_R 0x00,0xF8,0xF8,0x0E = fabs v0.4h, v0.4h # ENC_FRINTP_ASIMDMISCFP16_R 0x00,0x88,0xF9,0x0E = frintp v0.4h, v0.4h # ENC_FRINTZ_ASIMDMISCFP16_R 0x00,0x98,0xF9,0x0E = frintz v0.4h, v0.4h # ENC_FCVTPS_ASIMDMISCFP16_R 0x00,0xA8,0xF9,0x0E = fcvtps v0.4h, v0.4h # ENC_FCVTZS_ASIMDMISCFP16_R 0x00,0xB8,0xF9,0x0E = fcvtzs v0.4h, v0.4h # ENC_FRECPE_ASIMDMISCFP16_R 0x00,0xD8,0xF9,0x0E = frecpe v0.4h, v0.4h # ENC_MOVI_ASIMDIMM_L_SL 0x00,0x04,0x00,0x0F = movi v0.2s, #0 # ENC_FMLA_ASIMDELEM_RH_H 0x00,0x10,0x00,0x0F = fmla v0.4h, v0.4h, v0.h[0] # ENC_ORR_ASIMDIMM_L_SL 0x00,0x14,0x00,0x0F = orr v0.2s, #0 # ENC_SMLAL_ASIMDELEM_L 0x00,0x20,0x00,0x0F = orr v0.2s, #0 # ENC_SQDMLAL_ASIMDELEM_L 0x00,0x30,0x00,0x0F = orr v0.2s, #0 # ENC_FMLS_ASIMDELEM_RH_H 0x00,0x50,0x00,0x0F = fmls v0.4h, v0.4h, v0.h[0] # ENC_SMLSL_ASIMDELEM_L 0x00,0x60,0x00,0x0F = fmls v0.4h, v0.4h, v0.h[0] # ENC_SQDMLSL_ASIMDELEM_L 0x00,0x70,0x00,0x0F = fmls v0.4h, v0.4h, v0.h[0] # ENC_MUL_ASIMDELEM_R 0x00,0x80,0x00,0x0F = fmls v0.4h, v0.4h, v0.h[0] # ENC_MOVI_ASIMDIMM_L_HL 0x00,0x84,0x00,0x0F = movi v0.4h, #0 # ENC_FMUL_ASIMDELEM_RH_H 0x00,0x90,0x00,0x0F = fmul v0.4h, v0.4h, v0.h[0] # ENC_ORR_ASIMDIMM_L_HL 0x00,0x94,0x00,0x0F = orr v0.4h, #0 # ENC_SMULL_ASIMDELEM_L 0x00,0xA0,0x00,0x0F = orr v0.4h, #0 # ENC_SQDMULL_ASIMDELEM_L 0x00,0xB0,0x00,0x0F = orr v0.4h, #0 # ENC_SQDMULH_ASIMDELEM_R 0x00,0xC0,0x00,0x0F = orr v0.4h, #0 # ENC_MOVI_ASIMDIMM_M_SM 0x00,0xC4,0x00,0x0F = movi v0.2s, #0, msl #8 # ENC_SQRDMULH_ASIMDELEM_R 0x00,0xD0,0x00,0x0F = movi v0.2s, #0, msl #8 # ENC_SDOT_ASIMDELEM_D 0x00,0xE0,0x00,0x0F = movi v0.2s, #0, msl #8 # ENC_MOVI_ASIMDIMM_N_B 0x00,0xE4,0x00,0x0F = movi v0.8b, #0 # ENC_SUDOT_ASIMDELEM_D 0x00,0xF0,0x00,0x0F = movi v0.8b, #0 # ENC_FMOV_ASIMDIMM_S_S 0x00,0xF4,0x00,0x0F = fmov v0.2s, #2.00000000 # ENC_FMOV_ASIMDIMM_H_H 0x00,0xFC,0x00,0x0F = fmov v0.4h, #2.00000000 # ENC_SSHR_ASIMDSHF_R 0x00,0x04,0x08,0x0F = sshr v0.8b, v0.8b, #8 # ENC_SSRA_ASIMDSHF_R 0x00,0x14,0x08,0x0F = ssra v0.8b, v0.8b, #8 # ENC_SRSHR_ASIMDSHF_R 0x00,0x24,0x08,0x0F = srshr v0.8b, v0.8b, #8 # ENC_SRSRA_ASIMDSHF_R 0x00,0x34,0x08,0x0F = srsra v0.8b, v0.8b, #8 # ENC_SHL_ASIMDSHF_R 0x00,0x54,0x08,0x0F = shl v0.8b, v0.8b, #0 # ENC_SQSHL_ASIMDSHF_R 0x00,0x74,0x08,0x0F = sqshl v0.8b, v0.8b, #0 # ENC_SHRN_ASIMDSHF_N 0x00,0x84,0x08,0x0F = shrn v0.8b, v0.8h, #8 # ENC_RSHRN_ASIMDSHF_N 0x00,0x8C,0x08,0x0F = rshrn v0.8b, v0.8h, #8 # ENC_SQSHRN_ASIMDSHF_N 0x00,0x94,0x08,0x0F = sqshrn v0.8b, v0.8h, #8 # ENC_SQRSHRN_ASIMDSHF_N 0x00,0x9C,0x08,0x0F = sqrshrn v0.8b, v0.8h, #8 # ENC_SXTL_SSHLL_ASIMDSHF_L 0x00,0xA4,0x08,0x0F = sshll v0.8h, v0.8b, #0 # ENC_SCVTF_ASIMDSHF_C 0x00,0xE4,0x08,0x0F = sshll v0.8h, v0.8b, #0 # ENC_FCVTZS_ASIMDSHF_C 0x00,0xFC,0x08,0x0F = sshll v0.8h, v0.8b, #0 # ENC_SSHLL_ASIMDSHF_L 0x00,0xA4,0x09,0x0F = sshll v0.8h, v0.8b, #1 # ENC_BFDOT_ASIMDELEM_E 0x00,0xF0,0x40,0x0F = sshll v0.8h, v0.8b, #1 # ENC_FMLAL_ASIMDELEM_LH 0x00,0x00,0x80,0x0F = fmlal v0.2s, v0.2h, v0.h[0] # ENC_FMLA_ASIMDELEM_R_SD 0x00,0x10,0x80,0x0F = fmla v0.2s, v0.2s, v0.s[0] # ENC_FMLSL_ASIMDELEM_LH 0x00,0x40,0x80,0x0F = fmlsl v0.2s, v0.2h, v0.h[0] # ENC_FMLS_ASIMDELEM_R_SD 0x00,0x50,0x80,0x0F = fmls v0.2s, v0.2s, v0.s[0] # ENC_FMUL_ASIMDELEM_R_SD 0x00,0x90,0x80,0x0F = fmul v0.2s, v0.2s, v0.s[0] # ENC_USDOT_ASIMDELEM_D 0x00,0xF0,0x80,0x0F = fmul v0.2s, v0.2s, v0.s[0] # ENC_BFMLAL_ASIMDELEM_F 0x00,0xF0,0xC0,0x0F = fmul v0.2s, v0.2s, v0.s[0] # ENC_ADR_ONLY_PCRELADDR 0x00,0x00,0x00,0x10 = adr x0, #0 # ENC_ADD_32_ADDSUB_IMM 0x00,0x00,0x00,0x11 = add w0, w0, #0 # ENC_MOV_ADD_32_ADDSUB_IMM 0x1F,0x00,0x00,0x11 = mov wsp, w0 # ENC_AND_32_LOG_IMM 0x00,0x00,0x00,0x12 = and w0, w0, #0x1 # ENC_MOV_MOVN_32_MOVEWIDE 0x00,0x00,0x80,0x12 = mov w0, #-1 # ENC_SBFX_SBFM_32M_BITFIELD 0x00,0x00,0x00,0x13 = sbfx w0, w0, #0, #1 # ENC_SXTB_SBFM_32M_BITFIELD 0x00,0x1C,0x00,0x13 = sxtb w0, w0 # ENC_SXTH_SBFM_32M_BITFIELD 0x00,0x3C,0x00,0x13 = sxth w0, w0 # ENC_ASR_SBFM_32M_BITFIELD 0x00,0x7C,0x00,0x13 = asr w0, w0, #0 # ENC_SBFIZ_SBFM_32M_BITFIELD 0x00,0x00,0x01,0x13 = sbfiz w0, w0, #31, #1 # ENC_ROR_EXTR_32_EXTRACT 0x00,0x00,0x80,0x13 = ror w0, w0, #0 # ENC_EXTR_32_EXTRACT 0x20,0x00,0x80,0x13 = extr w0, w1, w0, #0 # ENC_B_ONLY_BRANCH_IMM 0x00,0x00,0x00,0x14 = b 0x0 # ENC_LDR_32_LOADLIT 0x00,0x00,0x00,0x18 = ldr w0, 0x0 # ENC_STLURB_32_LDAPSTL_UNSCALED 0x00,0x00,0x00,0x19 = stlurb w0, [x0] # ENC_LDAPURB_32_LDAPSTL_UNSCALED 0x00,0x00,0x40,0x19 = ldapurb w0, [x0] # ENC_LDAPURSB_64_LDAPSTL_UNSCALED 0x00,0x00,0x80,0x19 = ldapursb x0, [x0] # ENC_LDAPURSB_32_LDAPSTL_UNSCALED 0x00,0x00,0xC0,0x19 = ldapursb w0, [x0] # ENC_ADC_32_ADDSUB_CARRY 0x00,0x00,0x00,0x1A = adc w0, w0, w0 # ENC_CSEL_32_CONDSEL 0x00,0x00,0x80,0x1A = csel w0, w0, w0, eq # ENC_CINC_CSINC_32_CONDSEL 0x00,0x04,0x80,0x1A = cinc w0, w0, ne # ENC_CSINC_32_CONDSEL 0x20,0x04,0x80,0x1A = csinc w0, w1, w0, eq # ENC_CSET_CSINC_32_CONDSEL 0xE0,0x07,0x9F,0x1A = cset w0, ne # ENC_UDIV_32_DP_2SRC 0x00,0x08,0xC0,0x1A = udiv w0, w0, w0 # ENC_SDIV_32_DP_2SRC 0x00,0x0C,0xC0,0x1A = sdiv w0, w0, w0 # ENC_LSL_LSLV_32_DP_2SRC 0x00,0x20,0xC0,0x1A = lsl w0, w0, w0 # ENC_LSR_LSRV_32_DP_2SRC 0x00,0x24,0xC0,0x1A = lsr w0, w0, w0 # ENC_ASR_ASRV_32_DP_2SRC 0x00,0x28,0xC0,0x1A = asr w0, w0, w0 # ENC_ROR_RORV_32_DP_2SRC 0x00,0x2C,0xC0,0x1A = ror w0, w0, w0 # ENC_CRC32B_32C_DP_2SRC 0x00,0x40,0xC0,0x1A = crc32b w0, w0, w0 # ENC_CRC32H_32C_DP_2SRC 0x00,0x44,0xC0,0x1A = crc32h w0, w0, w0 # ENC_CRC32W_32C_DP_2SRC 0x00,0x48,0xC0,0x1A = crc32w w0, w0, w0 # ENC_CRC32CB_32C_DP_2SRC 0x00,0x50,0xC0,0x1A = crc32cb w0, w0, w0 # ENC_CRC32CH_32C_DP_2SRC 0x00,0x54,0xC0,0x1A = crc32ch w0, w0, w0 # ENC_CRC32CW_32C_DP_2SRC 0x00,0x58,0xC0,0x1A = crc32cw w0, w0, w0 # ENC_MADD_32A_DP_3SRC 0x00,0x00,0x00,0x1B = madd w0, w0, w0, w0 # ENC_MUL_MADD_32A_DP_3SRC 0x00,0x7C,0x00,0x1B = mul w0, w0, w0 # ENC_MSUB_32A_DP_3SRC 0x00,0x80,0x00,0x1B = msub w0, w0, w0, w0 # ENC_MNEG_MSUB_32A_DP_3SRC 0x00,0xFC,0x00,0x1B = mneg w0, w0, w0 # ENC_LDR_S_LOADLIT 0x00,0x00,0x00,0x1C = ldr s0, 0x0 # ENC_SCVTF_S32_FLOAT2FIX 0x00,0x00,0x02,0x1E = ldr s0, 0x0 # ENC_UCVTF_S32_FLOAT2FIX 0x00,0x00,0x03,0x1E = ldr s0, 0x0 # ENC_FCVTZS_32S_FLOAT2FIX 0x00,0x00,0x18,0x1E = ldr s0, 0x0 # ENC_FCVTZU_32S_FLOAT2FIX 0x00,0x00,0x19,0x1E = ldr s0, 0x0 # ENC_FCVTNS_32S_FLOAT2INT 0x00,0x00,0x20,0x1E = fcvtns w0, s0 # ENC_FCCMP_S_FLOATCCMP 0x00,0x04,0x20,0x1E = fccmp s0, s0, #0, eq # ENC_FCCMPE_S_FLOATCCMP 0x10,0x04,0x20,0x1E = fccmpe s0, s0, #0, eq # ENC_FMUL_S_FLOATDP2 0x00,0x08,0x20,0x1E = fmul s0, s0, s0 # ENC_FCSEL_S_FLOATSEL 0x00,0x0C,0x20,0x1E = fcsel s0, s0, s0, eq # ENC_FMOV_S_FLOATIMM 0x00,0x10,0x20,0x1E = fmov s0, #2.00000000 # ENC_FDIV_S_FLOATDP2 0x00,0x18,0x20,0x1E = fdiv s0, s0, s0 # ENC_FCMP_S_FLOATCMP 0x00,0x20,0x20,0x1E = fcmp s0, s0 # ENC_FCMP_SZ_FLOATCMP 0x08,0x20,0x20,0x1E = fcmp s0, #0.0 # ENC_FCMPE_S_FLOATCMP 0x10,0x20,0x20,0x1E = fcmpe s0, s0 # ENC_FCMPE_SZ_FLOATCMP 0x18,0x20,0x20,0x1E = fcmpe s0, #0.0 # ENC_FADD_S_FLOATDP2 0x00,0x28,0x20,0x1E = fadd s0, s0, s0 # ENC_FSUB_S_FLOATDP2 0x00,0x38,0x20,0x1E = fsub s0, s0, s0 # ENC_FMOV_S_FLOATDP1 0x00,0x40,0x20,0x1E = fmov s0, s0 # ENC_FMAX_S_FLOATDP2 0x00,0x48,0x20,0x1E = fmax s0, s0, s0 # ENC_FMIN_S_FLOATDP2 0x00,0x58,0x20,0x1E = fmin s0, s0, s0 # ENC_FMAXNM_S_FLOATDP2 0x00,0x68,0x20,0x1E = fmaxnm s0, s0, s0 # ENC_FMINNM_S_FLOATDP2 0x00,0x78,0x20,0x1E = fminnm s0, s0, s0 # ENC_FNMUL_S_FLOATDP2 0x00,0x88,0x20,0x1E = fnmul s0, s0, s0 # ENC_FABS_S_FLOATDP1 0x00,0xC0,0x20,0x1E = fabs s0, s0 # ENC_FCVTNU_32S_FLOAT2INT 0x00,0x00,0x21,0x1E = fcvtnu w0, s0 # ENC_FNEG_S_FLOATDP1 0x00,0x40,0x21,0x1E = fneg s0, s0 # ENC_FSQRT_S_FLOATDP1 0x00,0xC0,0x21,0x1E = fsqrt s0, s0 # ENC_SCVTF_S32_FLOAT2INT 0x00,0x00,0x22,0x1E = scvtf s0, w0 # ENC_FCVT_DS_FLOATDP1 0x00,0xC0,0x22,0x1E = fcvt d0, s0 # ENC_UCVTF_S32_FLOAT2INT 0x00,0x00,0x23,0x1E = ucvtf s0, w0 # ENC_FCVT_HS_FLOATDP1 0x00,0xC0,0x23,0x1E = fcvt h0, s0 # ENC_FCVTAS_32S_FLOAT2INT 0x00,0x00,0x24,0x1E = fcvtas w0, s0 # ENC_FRINTN_S_FLOATDP1 0x00,0x40,0x24,0x1E = frintn s0, s0 # ENC_FRINTP_S_FLOATDP1 0x00,0xC0,0x24,0x1E = frintp s0, s0 # ENC_FCVTAU_32S_FLOAT2INT 0x00,0x00,0x25,0x1E = fcvtau w0, s0 # ENC_FRINTM_S_FLOATDP1 0x00,0x40,0x25,0x1E = frintm s0, s0 # ENC_FRINTZ_S_FLOATDP1 0x00,0xC0,0x25,0x1E = frintz s0, s0 # ENC_FMOV_32S_FLOAT2INT 0x00,0x00,0x26,0x1E = fmov w0, s0 # ENC_FRINTA_S_FLOATDP1 0x00,0x40,0x26,0x1E = frinta s0, s0 # ENC_FMOV_S32_FLOAT2INT 0x00,0x00,0x27,0x1E = fmov s0, w0 # ENC_FRINTX_S_FLOATDP1 0x00,0x40,0x27,0x1E = frintx s0, s0 # ENC_FRINTI_S_FLOATDP1 0x00,0xC0,0x27,0x1E = frinti s0, s0 # ENC_FCVTPS_32S_FLOAT2INT 0x00,0x00,0x28,0x1E = fcvtps w0, s0 # ENC_FRINT32Z_S_FLOATDP1 0x00,0x40,0x28,0x1E = frint32z s0, s0 # ENC_FRINT32X_S_FLOATDP1 0x00,0xC0,0x28,0x1E = frint32x s0, s0 # ENC_FCVTPU_32S_FLOAT2INT 0x00,0x00,0x29,0x1E = fcvtpu w0, s0 # ENC_FRINT64Z_S_FLOATDP1 0x00,0x40,0x29,0x1E = frint64z s0, s0 # ENC_FRINT64X_S_FLOATDP1 0x00,0xC0,0x29,0x1E = frint64x s0, s0 # ENC_FCVTMS_32S_FLOAT2INT 0x00,0x00,0x30,0x1E = fcvtms w0, s0 # ENC_FCVTMU_32S_FLOAT2INT 0x00,0x00,0x31,0x1E = fcvtmu w0, s0 # ENC_FCVTZS_32S_FLOAT2INT 0x00,0x00,0x38,0x1E = fcvtzs w0, s0 # ENC_FCVTZU_32S_FLOAT2INT 0x00,0x00,0x39,0x1E = fcvtzu w0, s0 # ENC_SCVTF_D32_FLOAT2FIX 0x00,0x00,0x42,0x1E = fcvtzu w0, s0 # ENC_UCVTF_D32_FLOAT2FIX 0x00,0x00,0x43,0x1E = fcvtzu w0, s0 # ENC_FCVTZS_32D_FLOAT2FIX 0x00,0x00,0x58,0x1E = fcvtzu w0, s0 # ENC_FCVTZU_32D_FLOAT2FIX 0x00,0x00,0x59,0x1E = fcvtzu w0, s0 # ENC_FCVTNS_32D_FLOAT2INT 0x00,0x00,0x60,0x1E = fcvtns w0, d0 # ENC_FCCMP_D_FLOATCCMP 0x00,0x04,0x60,0x1E = fccmp d0, d0, #0, eq # ENC_FCCMPE_D_FLOATCCMP 0x10,0x04,0x60,0x1E = fccmpe d0, d0, #0, eq # ENC_FMUL_D_FLOATDP2 0x00,0x08,0x60,0x1E = fmul d0, d0, d0 # ENC_FCSEL_D_FLOATSEL 0x00,0x0C,0x60,0x1E = fcsel d0, d0, d0, eq # ENC_FMOV_D_FLOATIMM 0x00,0x10,0x60,0x1E = fmov d0, #2.00000000 # ENC_FDIV_D_FLOATDP2 0x00,0x18,0x60,0x1E = fdiv d0, d0, d0 # ENC_FCMP_D_FLOATCMP 0x00,0x20,0x60,0x1E = fcmp d0, d0 # ENC_FCMP_DZ_FLOATCMP 0x08,0x20,0x60,0x1E = fcmp d0, #0.0 # ENC_FCMPE_D_FLOATCMP 0x10,0x20,0x60,0x1E = fcmpe d0, d0 # ENC_FCMPE_DZ_FLOATCMP 0x18,0x20,0x60,0x1E = fcmpe d0, #0.0 # ENC_FADD_D_FLOATDP2 0x00,0x28,0x60,0x1E = fadd d0, d0, d0 # ENC_FSUB_D_FLOATDP2 0x00,0x38,0x60,0x1E = fsub d0, d0, d0 # ENC_FMOV_D_FLOATDP1 0x00,0x40,0x60,0x1E = fmov d0, d0 # ENC_FMAX_D_FLOATDP2 0x00,0x48,0x60,0x1E = fmax d0, d0, d0 # ENC_FMIN_D_FLOATDP2 0x00,0x58,0x60,0x1E = fmin d0, d0, d0 # ENC_FMAXNM_D_FLOATDP2 0x00,0x68,0x60,0x1E = fmaxnm d0, d0, d0 # ENC_FMINNM_D_FLOATDP2 0x00,0x78,0x60,0x1E = fminnm d0, d0, d0 # ENC_FNMUL_D_FLOATDP2 0x00,0x88,0x60,0x1E = fnmul d0, d0, d0 # ENC_FABS_D_FLOATDP1 0x00,0xC0,0x60,0x1E = fabs d0, d0 # ENC_FCVTNU_32D_FLOAT2INT 0x00,0x00,0x61,0x1E = fcvtnu w0, d0 # ENC_FNEG_D_FLOATDP1 0x00,0x40,0x61,0x1E = fneg d0, d0 # ENC_FSQRT_D_FLOATDP1 0x00,0xC0,0x61,0x1E = fsqrt d0, d0 # ENC_SCVTF_D32_FLOAT2INT 0x00,0x00,0x62,0x1E = scvtf d0, w0 # ENC_FCVT_SD_FLOATDP1 0x00,0x40,0x62,0x1E = fcvt s0, d0 # ENC_UCVTF_D32_FLOAT2INT 0x00,0x00,0x63,0x1E = ucvtf d0, w0 # ENC_BFCVT_BS_FLOATDP1 0x00,0x40,0x63,0x1E = ucvtf d0, w0 # ENC_FCVT_HD_FLOATDP1 0x00,0xC0,0x63,0x1E = fcvt h0, d0 # ENC_FCVTAS_32D_FLOAT2INT 0x00,0x00,0x64,0x1E = fcvtas w0, d0 # ENC_FRINTN_D_FLOATDP1 0x00,0x40,0x64,0x1E = frintn d0, d0 # ENC_FRINTP_D_FLOATDP1 0x00,0xC0,0x64,0x1E = frintp d0, d0 # ENC_FCVTAU_32D_FLOAT2INT 0x00,0x00,0x65,0x1E = fcvtau w0, d0 # ENC_FRINTM_D_FLOATDP1 0x00,0x40,0x65,0x1E = frintm d0, d0 # ENC_FRINTZ_D_FLOATDP1 0x00,0xC0,0x65,0x1E = frintz d0, d0 # ENC_FRINTA_D_FLOATDP1 0x00,0x40,0x66,0x1E = frinta d0, d0 # ENC_FRINTX_D_FLOATDP1 0x00,0x40,0x67,0x1E = frintx d0, d0 # ENC_FRINTI_D_FLOATDP1 0x00,0xC0,0x67,0x1E = frinti d0, d0 # ENC_FCVTPS_32D_FLOAT2INT 0x00,0x00,0x68,0x1E = fcvtps w0, d0 # ENC_FRINT32Z_D_FLOATDP1 0x00,0x40,0x68,0x1E = frint32z d0, d0 # ENC_FRINT32X_D_FLOATDP1 0x00,0xC0,0x68,0x1E = frint32x d0, d0 # ENC_FCVTPU_32D_FLOAT2INT 0x00,0x00,0x69,0x1E = fcvtpu w0, d0 # ENC_FRINT64Z_D_FLOATDP1 0x00,0x40,0x69,0x1E = frint64z d0, d0 # ENC_FRINT64X_D_FLOATDP1 0x00,0xC0,0x69,0x1E = frint64x d0, d0 # ENC_FCVTMS_32D_FLOAT2INT 0x00,0x00,0x70,0x1E = fcvtms w0, d0 # ENC_FCVTMU_32D_FLOAT2INT 0x00,0x00,0x71,0x1E = fcvtmu w0, d0 # ENC_FCVTZS_32D_FLOAT2INT 0x00,0x00,0x78,0x1E = fcvtzs w0, d0 # ENC_FCVTZU_32D_FLOAT2INT 0x00,0x00,0x79,0x1E = fcvtzu w0, d0 # ENC_FJCVTZS_32D_FLOAT2INT 0x00,0x00,0x7E,0x1E = fjcvtzs w0, d0 # ENC_SCVTF_H32_FLOAT2FIX 0x00,0x00,0xC2,0x1E = fjcvtzs w0, d0 # ENC_UCVTF_H32_FLOAT2FIX 0x00,0x00,0xC3,0x1E = fjcvtzs w0, d0 # ENC_FCVTZS_32H_FLOAT2FIX 0x00,0x00,0xD8,0x1E = fjcvtzs w0, d0 # ENC_FCVTZU_32H_FLOAT2FIX 0x00,0x00,0xD9,0x1E = fjcvtzs w0, d0 # ENC_FCVTNS_32H_FLOAT2INT 0x00,0x00,0xE0,0x1E = fcvtns w0, h0 # ENC_FCCMP_H_FLOATCCMP 0x00,0x04,0xE0,0x1E = fccmp h0, h0, #0, eq # ENC_FCCMPE_H_FLOATCCMP 0x10,0x04,0xE0,0x1E = fccmpe h0, h0, #0, eq # ENC_FMUL_H_FLOATDP2 0x00,0x08,0xE0,0x1E = fmul h0, h0, h0 # ENC_FCSEL_H_FLOATSEL 0x00,0x0C,0xE0,0x1E = fcsel h0, h0, h0, eq # ENC_FMOV_H_FLOATIMM 0x00,0x10,0xE0,0x1E = fmov h0, #2.00000000 # ENC_FDIV_H_FLOATDP2 0x00,0x18,0xE0,0x1E = fdiv h0, h0, h0 # ENC_FCMP_H_FLOATCMP 0x00,0x20,0xE0,0x1E = fcmp h0, h0 # ENC_FCMP_HZ_FLOATCMP 0x08,0x20,0xE0,0x1E = fcmp h0, #0.0 # ENC_FCMPE_H_FLOATCMP 0x10,0x20,0xE0,0x1E = fcmpe h0, h0 # ENC_FCMPE_HZ_FLOATCMP 0x18,0x20,0xE0,0x1E = fcmpe h0, #0.0 # ENC_FADD_H_FLOATDP2 0x00,0x28,0xE0,0x1E = fadd h0, h0, h0 # ENC_FSUB_H_FLOATDP2 0x00,0x38,0xE0,0x1E = fsub h0, h0, h0 # ENC_FMOV_H_FLOATDP1 0x00,0x40,0xE0,0x1E = fmov h0, h0 # ENC_FMAX_H_FLOATDP2 0x00,0x48,0xE0,0x1E = fmax h0, h0, h0 # ENC_FMIN_H_FLOATDP2 0x00,0x58,0xE0,0x1E = fmin h0, h0, h0 # ENC_FMAXNM_H_FLOATDP2 0x00,0x68,0xE0,0x1E = fmaxnm h0, h0, h0 # ENC_FMINNM_H_FLOATDP2 0x00,0x78,0xE0,0x1E = fminnm h0, h0, h0 # ENC_FNMUL_H_FLOATDP2 0x00,0x88,0xE0,0x1E = fnmul h0, h0, h0 # ENC_FABS_H_FLOATDP1 0x00,0xC0,0xE0,0x1E = fabs h0, h0 # ENC_FCVTNU_32H_FLOAT2INT 0x00,0x00,0xE1,0x1E = fcvtnu w0, h0 # ENC_FNEG_H_FLOATDP1 0x00,0x40,0xE1,0x1E = fneg h0, h0 # ENC_FSQRT_H_FLOATDP1 0x00,0xC0,0xE1,0x1E = fsqrt h0, h0 # ENC_SCVTF_H32_FLOAT2INT 0x00,0x00,0xE2,0x1E = scvtf h0, w0 # ENC_FCVT_SH_FLOATDP1 0x00,0x40,0xE2,0x1E = fcvt s0, h0 # ENC_FCVT_DH_FLOATDP1 0x00,0xC0,0xE2,0x1E = fcvt d0, h0 # ENC_UCVTF_H32_FLOAT2INT 0x00,0x00,0xE3,0x1E = ucvtf h0, w0 # ENC_FCVTAS_32H_FLOAT2INT 0x00,0x00,0xE4,0x1E = fcvtas w0, h0 # ENC_FRINTN_H_FLOATDP1 0x00,0x40,0xE4,0x1E = frintn h0, h0 # ENC_FRINTP_H_FLOATDP1 0x00,0xC0,0xE4,0x1E = frintp h0, h0 # ENC_FCVTAU_32H_FLOAT2INT 0x00,0x00,0xE5,0x1E = fcvtau w0, h0 # ENC_FRINTM_H_FLOATDP1 0x00,0x40,0xE5,0x1E = frintm h0, h0 # ENC_FRINTZ_H_FLOATDP1 0x00,0xC0,0xE5,0x1E = frintz h0, h0 # ENC_FMOV_32H_FLOAT2INT 0x00,0x00,0xE6,0x1E = fmov w0, h0 # ENC_FRINTA_H_FLOATDP1 0x00,0x40,0xE6,0x1E = frinta h0, h0 # ENC_FMOV_H32_FLOAT2INT 0x00,0x00,0xE7,0x1E = fmov h0, w0 # ENC_FRINTX_H_FLOATDP1 0x00,0x40,0xE7,0x1E = frintx h0, h0 # ENC_FRINTI_H_FLOATDP1 0x00,0xC0,0xE7,0x1E = frinti h0, h0 # ENC_FCVTPS_32H_FLOAT2INT 0x00,0x00,0xE8,0x1E = fcvtps w0, h0 # ENC_FCVTPU_32H_FLOAT2INT 0x00,0x00,0xE9,0x1E = fcvtpu w0, h0 # ENC_FCVTMS_32H_FLOAT2INT 0x00,0x00,0xF0,0x1E = fcvtms w0, h0 # ENC_FCVTMU_32H_FLOAT2INT 0x00,0x00,0xF1,0x1E = fcvtmu w0, h0 # ENC_FCVTZS_32H_FLOAT2INT 0x00,0x00,0xF8,0x1E = fcvtzs w0, h0 # ENC_FCVTZU_32H_FLOAT2INT 0x00,0x00,0xF9,0x1E = fcvtzu w0, h0 # ENC_FMADD_S_FLOATDP3 0x00,0x00,0x00,0x1F = fmadd s0, s0, s0, s0 # ENC_FMSUB_S_FLOATDP3 0x00,0x80,0x00,0x1F = fmsub s0, s0, s0, s0 # ENC_FNMADD_S_FLOATDP3 0x00,0x00,0x20,0x1F = fnmadd s0, s0, s0, s0 # ENC_FNMSUB_S_FLOATDP3 0x00,0x80,0x20,0x1F = fnmsub s0, s0, s0, s0 # ENC_FMADD_D_FLOATDP3 0x00,0x00,0x40,0x1F = fmadd d0, d0, d0, d0 # ENC_FMSUB_D_FLOATDP3 0x00,0x80,0x40,0x1F = fmsub d0, d0, d0, d0 # ENC_FNMADD_D_FLOATDP3 0x00,0x00,0x60,0x1F = fnmadd d0, d0, d0, d0 # ENC_FNMSUB_D_FLOATDP3 0x00,0x80,0x60,0x1F = fnmsub d0, d0, d0, d0 # ENC_FMADD_H_FLOATDP3 0x00,0x00,0xC0,0x1F = fmadd h0, h0, h0, h0 # ENC_FMSUB_H_FLOATDP3 0x00,0x80,0xC0,0x1F = fmsub h0, h0, h0, h0 # ENC_FNMADD_H_FLOATDP3 0x00,0x00,0xE0,0x1F = fnmadd h0, h0, h0, h0 # ENC_FNMSUB_H_FLOATDP3 0x00,0x80,0xE0,0x1F = fnmsub h0, h0, h0, h0 # ENC_CMPHS_P_P_ZZ_ 0x00,0x00,0x00,0x24 = fnmsub h0, h0, h0, h0 # ENC_CMPHI_P_P_ZZ_ 0x10,0x00,0x00,0x24 = fnmsub h0, h0, h0, h0 # ENC_CMPEQ_P_P_ZW_ 0x00,0x20,0x00,0x24 = fnmsub h0, h0, h0, h0 # ENC_CMPNE_P_P_ZW_ 0x10,0x20,0x00,0x24 = fnmsub h0, h0, h0, h0 # ENC_CMPGE_P_P_ZW_ 0x00,0x40,0x00,0x24 = fnmsub h0, h0, h0, h0 # ENC_CMPGT_P_P_ZW_ 0x10,0x40,0x00,0x24 = fnmsub h0, h0, h0, h0 # ENC_CMPLT_P_P_ZW_ 0x00,0x60,0x00,0x24 = fnmsub h0, h0, h0, h0 # ENC_CMPLE_P_P_ZW_ 0x10,0x60,0x00,0x24 = fnmsub h0, h0, h0, h0 # ENC_CMPGE_P_P_ZZ_ 0x00,0x80,0x00,0x24 = fnmsub h0, h0, h0, h0 # ENC_CMPGT_P_P_ZZ_ 0x10,0x80,0x00,0x24 = fnmsub h0, h0, h0, h0 # ENC_CMPEQ_P_P_ZZ_ 0x00,0xA0,0x00,0x24 = fnmsub h0, h0, h0, h0 # ENC_CMPNE_P_P_ZZ_ 0x10,0xA0,0x00,0x24 = fnmsub h0, h0, h0, h0 # ENC_CMPHS_P_P_ZW_ 0x00,0xC0,0x00,0x24 = fnmsub h0, h0, h0, h0 # ENC_CMPHI_P_P_ZW_ 0x10,0xC0,0x00,0x24 = fnmsub h0, h0, h0, h0 # ENC_CMPLO_P_P_ZW_ 0x00,0xE0,0x00,0x24 = fnmsub h0, h0, h0, h0 # ENC_CMPLS_P_P_ZW_ 0x10,0xE0,0x00,0x24 = fnmsub h0, h0, h0, h0 # ENC_CMPHS_P_P_ZI_ 0x00,0x00,0x20,0x24 = fnmsub h0, h0, h0, h0 # ENC_CMPHI_P_P_ZI_ 0x10,0x00,0x20,0x24 = fnmsub h0, h0, h0, h0 # ENC_CMPLO_P_P_ZI_ 0x00,0x20,0x20,0x24 = fnmsub h0, h0, h0, h0 # ENC_CMPLS_P_P_ZI_ 0x10,0x20,0x20,0x24 = fnmsub h0, h0, h0, h0 # ENC_CMPGE_P_P_ZI_ 0x00,0x00,0x00,0x25 = fnmsub h0, h0, h0, h0 # ENC_CMPGT_P_P_ZI_ 0x10,0x00,0x00,0x25 = fnmsub h0, h0, h0, h0 # ENC_CMPLT_P_P_ZI_ 0x00,0x20,0x00,0x25 = fnmsub h0, h0, h0, h0 # ENC_CMPLE_P_P_ZI_ 0x10,0x20,0x00,0x25 = fnmsub h0, h0, h0, h0 # ENC_MOV_AND_P_P_PP_Z 0x00,0x40,0x00,0x25 = fnmsub h0, h0, h0, h0 # ENC_BIC_P_P_PP_Z 0x10,0x40,0x00,0x25 = fnmsub h0, h0, h0, h0 # ENC_AND_P_P_PP_Z 0x20,0x40,0x00,0x25 = fnmsub h0, h0, h0, h0 # ENC_MOV_SEL_P_P_PP_ 0x10,0x42,0x00,0x25 = fnmsub h0, h0, h0, h0 # ENC_SEL_P_P_PP_ 0x11,0x42,0x00,0x25 = fnmsub h0, h0, h0, h0 # ENC_EOR_P_P_PP_Z 0x00,0x46,0x00,0x25 = fnmsub h0, h0, h0, h0 # ENC_CMPEQ_P_P_ZI_ 0x00,0x80,0x00,0x25 = fnmsub h0, h0, h0, h0 # ENC_CMPNE_P_P_ZI_ 0x10,0x80,0x00,0x25 = fnmsub h0, h0, h0, h0 # ENC_BRKPA_P_P_PP_ 0x00,0xC0,0x00,0x25 = fnmsub h0, h0, h0, h0 # ENC_BRKPB_P_P_PP_ 0x10,0xC0,0x00,0x25 = fnmsub h0, h0, h0, h0 # ENC_BRKA_P_P_P_ 0x00,0x40,0x10,0x25 = fnmsub h0, h0, h0, h0 # ENC_BRKN_P_P_PP_ 0x00,0x40,0x18,0x25 = fnmsub h0, h0, h0, h0 # ENC_PTRUE_P_S_ 0x00,0xE0,0x18,0x25 = fnmsub h0, h0, h0, h0 # ENC_PFALSE_P_ 0x00,0xE4,0x18,0x25 = fnmsub h0, h0, h0, h0 # ENC_RDFFR_P_P_F_ 0x00,0xF0,0x18,0x25 = fnmsub h0, h0, h0, h0 # ENC_PNEXT_P_P_P_ 0x00,0xC4,0x19,0x25 = fnmsub h0, h0, h0, h0 # ENC_PTRUES_P_S_ 0x00,0xE0,0x19,0x25 = fnmsub h0, h0, h0, h0 # ENC_RDFFR_P_F_ 0x00,0xF0,0x19,0x25 = fnmsub h0, h0, h0, h0 # ENC_WHILELT_P_P_RR_ 0x00,0x04,0x20,0x25 = fnmsub h0, h0, h0, h0 # ENC_WHILELE_P_P_RR_ 0x10,0x04,0x20,0x25 = fnmsub h0, h0, h0, h0 # ENC_WHILELO_P_P_RR_ 0x00,0x0C,0x20,0x25 = fnmsub h0, h0, h0, h0 # ENC_WHILELS_P_P_RR_ 0x10,0x0C,0x20,0x25 = fnmsub h0, h0, h0, h0 # ENC_CNTP_R_P_P_ 0x00,0x80,0x20,0x25 = fnmsub h0, h0, h0, h0 # ENC_ADD_Z_ZI_ 0x00,0xC0,0x20,0x25 = fnmsub h0, h0, h0, h0 # ENC_SUB_Z_ZI_ 0x00,0xC0,0x21,0x25 = fnmsub h0, h0, h0, h0 # ENC_SUBR_Z_ZI_ 0x00,0xC0,0x23,0x25 = fnmsub h0, h0, h0, h0 # ENC_SQADD_Z_ZI_ 0x00,0xC0,0x24,0x25 = fnmsub h0, h0, h0, h0 # ENC_UQADD_Z_ZI_ 0x00,0xC0,0x25,0x25 = fnmsub h0, h0, h0, h0 # ENC_SQSUB_Z_ZI_ 0x00,0xC0,0x26,0x25 = fnmsub h0, h0, h0, h0 # ENC_UQSUB_Z_ZI_ 0x00,0xC0,0x27,0x25 = fnmsub h0, h0, h0, h0 # ENC_SQINCP_Z_P_Z_ 0x00,0x80,0x28,0x25 = fnmsub h0, h0, h0, h0 # ENC_SQINCP_R_P_R_SX 0x00,0x88,0x28,0x25 = fnmsub h0, h0, h0, h0 # ENC_SQINCP_R_P_R_X 0x00,0x8C,0x28,0x25 = fnmsub h0, h0, h0, h0 # ENC_WRFFR_F_P_ 0x00,0x90,0x28,0x25 = fnmsub h0, h0, h0, h0 # ENC_SMAX_Z_ZI_ 0x00,0xC0,0x28,0x25 = fnmsub h0, h0, h0, h0 # ENC_UQINCP_Z_P_Z_ 0x00,0x80,0x29,0x25 = fnmsub h0, h0, h0, h0 # ENC_UQINCP_R_P_R_UW 0x00,0x88,0x29,0x25 = fnmsub h0, h0, h0, h0 # ENC_UQINCP_R_P_R_X 0x00,0x8C,0x29,0x25 = fnmsub h0, h0, h0, h0 # ENC_UMAX_Z_ZI_ 0x00,0xC0,0x29,0x25 = fnmsub h0, h0, h0, h0 # ENC_SQDECP_Z_P_Z_ 0x00,0x80,0x2A,0x25 = fnmsub h0, h0, h0, h0 # ENC_SQDECP_R_P_R_SX 0x00,0x88,0x2A,0x25 = fnmsub h0, h0, h0, h0 # ENC_SQDECP_R_P_R_X 0x00,0x8C,0x2A,0x25 = fnmsub h0, h0, h0, h0 # ENC_SMIN_Z_ZI_ 0x00,0xC0,0x2A,0x25 = fnmsub h0, h0, h0, h0 # ENC_UQDECP_Z_P_Z_ 0x00,0x80,0x2B,0x25 = fnmsub h0, h0, h0, h0 # ENC_UQDECP_R_P_R_UW 0x00,0x88,0x2B,0x25 = fnmsub h0, h0, h0, h0 # ENC_UQDECP_R_P_R_X 0x00,0x8C,0x2B,0x25 = fnmsub h0, h0, h0, h0 # ENC_UMIN_Z_ZI_ 0x00,0xC0,0x2B,0x25 = fnmsub h0, h0, h0, h0 # ENC_INCP_Z_P_Z_ 0x00,0x80,0x2C,0x25 = fnmsub h0, h0, h0, h0 # ENC_INCP_R_P_R_ 0x00,0x88,0x2C,0x25 = fnmsub h0, h0, h0, h0 # ENC_SETFFR_F_ 0x00,0x90,0x2C,0x25 = fnmsub h0, h0, h0, h0 # ENC_DECP_Z_P_Z_ 0x00,0x80,0x2D,0x25 = fnmsub h0, h0, h0, h0 # ENC_DECP_R_P_R_ 0x00,0x88,0x2D,0x25 = fnmsub h0, h0, h0, h0 # ENC_MUL_Z_ZI_ 0x00,0xC0,0x30,0x25 = fnmsub h0, h0, h0, h0 # ENC_MOV_DUP_Z_I_ 0x00,0xC0,0x38,0x25 = fnmsub h0, h0, h0, h0 # ENC_FMOV_FDUP_Z_I_ 0x00,0xC0,0x39,0x25 = fnmsub h0, h0, h0, h0 # ENC_MOVS_ANDS_P_P_PP_Z 0x00,0x40,0x40,0x25 = fnmsub h0, h0, h0, h0 # ENC_BICS_P_P_PP_Z 0x10,0x40,0x40,0x25 = fnmsub h0, h0, h0, h0 # ENC_ANDS_P_P_PP_Z 0x20,0x40,0x40,0x25 = fnmsub h0, h0, h0, h0 # ENC_NOTS_EORS_P_P_PP_Z 0x00,0x42,0x40,0x25 = fnmsub h0, h0, h0, h0 # ENC_EORS_P_P_PP_Z 0x00,0x46,0x40,0x25 = fnmsub h0, h0, h0, h0 # ENC_BRKPAS_P_P_PP_ 0x00,0xC0,0x40,0x25 = fnmsub h0, h0, h0, h0 # ENC_BRKPBS_P_P_PP_ 0x10,0xC0,0x40,0x25 = fnmsub h0, h0, h0, h0 # ENC_BRKAS_P_P_P_Z 0x00,0x40,0x50,0x25 = fnmsub h0, h0, h0, h0 # ENC_PTEST_P_P_ 0x00,0xC0,0x50,0x25 = fnmsub h0, h0, h0, h0 # ENC_BRKNS_P_P_PP_ 0x00,0x40,0x58,0x25 = fnmsub h0, h0, h0, h0 # ENC_PFIRST_P_P_P_ 0x00,0xC0,0x58,0x25 = fnmsub h0, h0, h0, h0 # ENC_RDFFRS_P_P_F_ 0x00,0xF0,0x58,0x25 = fnmsub h0, h0, h0, h0 # ENC_MOV_ORR_P_P_PP_Z 0x00,0x40,0x80,0x25 = fnmsub h0, h0, h0, h0 # ENC_ORN_P_P_PP_Z 0x10,0x40,0x80,0x25 = fnmsub h0, h0, h0, h0 # ENC_ORR_P_P_PP_Z 0x20,0x40,0x80,0x25 = fnmsub h0, h0, h0, h0 # ENC_NOR_P_P_PP_Z 0x00,0x42,0x80,0x25 = fnmsub h0, h0, h0, h0 # ENC_NAND_P_P_PP_Z 0x10,0x42,0x80,0x25 = fnmsub h0, h0, h0, h0 # ENC_BRKB_P_P_P_ 0x00,0x40,0x90,0x25 = fnmsub h0, h0, h0, h0 # ENC_CTERMEQ_RR_ 0x00,0x20,0xA0,0x25 = fnmsub h0, h0, h0, h0 # ENC_CTERMNE_RR_ 0x10,0x20,0xA0,0x25 = fnmsub h0, h0, h0, h0 # ENC_MOVS_ORRS_P_P_PP_Z 0x00,0x40,0xC0,0x25 = fnmsub h0, h0, h0, h0 # ENC_ORNS_P_P_PP_Z 0x10,0x40,0xC0,0x25 = fnmsub h0, h0, h0, h0 # ENC_ORRS_P_P_PP_Z 0x20,0x40,0xC0,0x25 = fnmsub h0, h0, h0, h0 # ENC_NORS_P_P_PP_Z 0x00,0x42,0xC0,0x25 = fnmsub h0, h0, h0, h0 # ENC_NANDS_P_P_PP_Z 0x10,0x42,0xC0,0x25 = fnmsub h0, h0, h0, h0 # ENC_BRKBS_P_P_P_Z 0x00,0x40,0xD0,0x25 = fnmsub h0, h0, h0, h0 # ENC_STNP_32_LDSTNAPAIR_OFFS 0x00,0x00,0x00,0x28 = stnp w0, w0, [x0] # ENC_LDNP_32_LDSTNAPAIR_OFFS 0x00,0x00,0x40,0x28 = stnp w0, w0, [x0] # ENC_STP_32_LDSTPAIR_POST 0x00,0x00,0x80,0x28 = stnp w0, w0, [x0] # ENC_LDP_32_LDSTPAIR_POST 0x00,0x00,0xC0,0x28 = stnp w0, w0, [x0] # ENC_STP_32_LDSTPAIR_OFF 0x00,0x00,0x00,0x29 = stp w0, w0, [x0] # ENC_LDP_32_LDSTPAIR_OFF 0x00,0x00,0x40,0x29 = stp w0, w0, [x0] # ENC_STP_32_LDSTPAIR_PRE 0x00,0x00,0x80,0x29 = stp w0, w0, [x0] # ENC_LDP_32_LDSTPAIR_PRE 0x00,0x00,0xC0,0x29 = stp w0, w0, [x0] # ENC_ORR_32_LOG_SHIFT 0x00,0x00,0x00,0x2A = orr w0, w0, w0 # ENC_MOV_ORR_32_LOG_SHIFT 0xE0,0x03,0x00,0x2A = mov w0, w0 # ENC_ORN_32_LOG_SHIFT 0x00,0x00,0x20,0x2A = orn w0, w0, w0 # ENC_MVN_ORN_32_LOG_SHIFT 0xE0,0x03,0x20,0x2A = mvn w0, w0 # ENC_ADDS_32_ADDSUB_SHIFT 0x00,0x00,0x00,0x2B = adds w0, w0, w0 # ENC_CMN_ADDS_32_ADDSUB_SHIFT 0x1F,0x00,0x00,0x2B = cmn w0, w0 # ENC_ADDS_32S_ADDSUB_EXT 0x00,0x00,0x20,0x2B = adds w0, w0, w0, uxtb # ENC_CMN_ADDS_32S_ADDSUB_EXT 0x1F,0x00,0x20,0x2B = cmn w0, w0, uxtb # ENC_STNP_S_LDSTNAPAIR_OFFS 0x00,0x00,0x00,0x2C = stnp s0, s0, [x0] # ENC_LDNP_S_LDSTNAPAIR_OFFS 0x00,0x00,0x40,0x2C = stnp s0, s0, [x0] # ENC_STP_S_LDSTPAIR_POST 0x00,0x00,0x80,0x2C = stp s0, s0, [x0], #0 # ENC_LDP_S_LDSTPAIR_POST 0x00,0x00,0xC0,0x2C = stp s0, s0, [x0], #0 # ENC_STP_S_LDSTPAIR_OFF 0x00,0x00,0x00,0x2D = stp s0, s0, [x0] # ENC_LDP_S_LDSTPAIR_OFF 0x00,0x00,0x40,0x2D = stp s0, s0, [x0] # ENC_STP_S_LDSTPAIR_PRE 0x00,0x00,0x80,0x2D = stp s0, s0, [x0, #0]! # ENC_LDP_S_LDSTPAIR_PRE 0x00,0x00,0xC0,0x2D = stp s0, s0, [x0, #0]! # ENC_EXT_ASIMDEXT_ONLY 0x00,0x00,0x00,0x2E = ext v0.8b, v0.8b, v0.8b, #0 # ENC_SQRDMLAH_ASIMDSAME2_ONLY 0x00,0x84,0x00,0x2E = ext v0.8b, v0.8b, v0.8b, #0 # ENC_SQRDMLSH_ASIMDSAME2_ONLY 0x00,0x8C,0x00,0x2E = ext v0.8b, v0.8b, v0.8b, #0 # ENC_UDOT_ASIMDSAME2_D 0x00,0x94,0x00,0x2E = ext v0.8b, v0.8b, v0.8b, #0 # ENC_FCMLA_ASIMDSAME2_C 0x00,0xC4,0x00,0x2E = ext v0.8b, v0.8b, v0.8b, #0 # ENC_FCADD_ASIMDSAME2_C 0x00,0xE4,0x00,0x2E = ext v0.8b, v0.8b, v0.8b, #0 # ENC_UADDL_ASIMDDIFF_L 0x00,0x00,0x20,0x2E = uaddl v0.8h, v0.8b, v0.8b # ENC_UHADD_ASIMDSAME_ONLY 0x00,0x04,0x20,0x2E = uhadd v0.8b, v0.8b, v0.8b # ENC_REV32_ASIMDMISC_R 0x00,0x08,0x20,0x2E = rev32 v0.8b, v0.8b # ENC_UQADD_ASIMDSAME_ONLY 0x00,0x0C,0x20,0x2E = uqadd v0.8b, v0.8b, v0.8b # ENC_UADDW_ASIMDDIFF_W 0x00,0x10,0x20,0x2E = uaddw v0.8h, v0.8h, v0.8b # ENC_URHADD_ASIMDSAME_ONLY 0x00,0x14,0x20,0x2E = urhadd v0.8b, v0.8b, v0.8b # ENC_EOR_ASIMDSAME_ONLY 0x00,0x1C,0x20,0x2E = eor v0.8b, v0.8b, v0.8b # ENC_USUBL_ASIMDDIFF_L 0x00,0x20,0x20,0x2E = usubl v0.8h, v0.8b, v0.8b # ENC_UHSUB_ASIMDSAME_ONLY 0x00,0x24,0x20,0x2E = uhsub v0.8b, v0.8b, v0.8b # ENC_UADDLP_ASIMDMISC_P 0x00,0x28,0x20,0x2E = uaddlp v0.4h, v0.8b # ENC_UQSUB_ASIMDSAME_ONLY 0x00,0x2C,0x20,0x2E = uqsub v0.8b, v0.8b, v0.8b # ENC_USUBW_ASIMDDIFF_W 0x00,0x30,0x20,0x2E = usubw v0.8h, v0.8h, v0.8b # ENC_CMHI_ASIMDSAME_ONLY 0x00,0x34,0x20,0x2E = cmhi v0.8b, v0.8b, v0.8b # ENC_USQADD_ASIMDMISC_R 0x00,0x38,0x20,0x2E = usqadd v0.8b, v0.8b # ENC_CMHS_ASIMDSAME_ONLY 0x00,0x3C,0x20,0x2E = cmhs v0.8b, v0.8b, v0.8b # ENC_RADDHN_ASIMDDIFF_N 0x00,0x40,0x20,0x2E = raddhn v0.8b, v0.8h, v0.8h # ENC_USHL_ASIMDSAME_ONLY 0x00,0x44,0x20,0x2E = ushl v0.8b, v0.8b, v0.8b # ENC_CLZ_ASIMDMISC_R 0x00,0x48,0x20,0x2E = clz v0.8b, v0.8b # ENC_UQSHL_ASIMDSAME_ONLY 0x00,0x4C,0x20,0x2E = uqshl v0.8b, v0.8b, v0.8b # ENC_UABAL_ASIMDDIFF_L 0x00,0x50,0x20,0x2E = uabal v0.8h, v0.8b, v0.8b # ENC_URSHL_ASIMDSAME_ONLY 0x00,0x54,0x20,0x2E = urshl v0.8b, v0.8b, v0.8b # ENC_MVN_NOT_ASIMDMISC_R 0x00,0x58,0x20,0x2E = mvn v0.8b, v0.8b # ENC_UQRSHL_ASIMDSAME_ONLY 0x00,0x5C,0x20,0x2E = uqrshl v0.8b, v0.8b, v0.8b # ENC_RSUBHN_ASIMDDIFF_N 0x00,0x60,0x20,0x2E = rsubhn v0.8b, v0.8h, v0.8h # ENC_UMAX_ASIMDSAME_ONLY 0x00,0x64,0x20,0x2E = umax v0.8b, v0.8b, v0.8b # ENC_UADALP_ASIMDMISC_P 0x00,0x68,0x20,0x2E = uadalp v0.4h, v0.8b # ENC_UMIN_ASIMDSAME_ONLY 0x00,0x6C,0x20,0x2E = umin v0.8b, v0.8b, v0.8b # ENC_UABDL_ASIMDDIFF_L 0x00,0x70,0x20,0x2E = uabdl v0.8h, v0.8b, v0.8b # ENC_UABD_ASIMDSAME_ONLY 0x00,0x74,0x20,0x2E = uabd v0.8b, v0.8b, v0.8b # ENC_SQNEG_ASIMDMISC_R 0x00,0x78,0x20,0x2E = sqneg v0.8b, v0.8b # ENC_UABA_ASIMDSAME_ONLY 0x00,0x7C,0x20,0x2E = uaba v0.8b, v0.8b, v0.8b # ENC_UMLAL_ASIMDDIFF_L 0x00,0x80,0x20,0x2E = umlal v0.8h, v0.8b, v0.8b # ENC_SUB_ASIMDSAME_ONLY 0x00,0x84,0x20,0x2E = sub v0.8b, v0.8b, v0.8b # ENC_CMGE_ASIMDMISC_Z 0x00,0x88,0x20,0x2E = cmge v0.8b, v0.8b, #0 # ENC_CMEQ_ASIMDSAME_ONLY 0x00,0x8C,0x20,0x2E = cmeq v0.8b, v0.8b, v0.8b # ENC_MLS_ASIMDSAME_ONLY 0x00,0x94,0x20,0x2E = mls v0.8b, v0.8b, v0.8b # ENC_CMLE_ASIMDMISC_Z 0x00,0x98,0x20,0x2E = cmle v0.8b, v0.8b, #0 # ENC_PMUL_ASIMDSAME_ONLY 0x00,0x9C,0x20,0x2E = pmul v0.8b, v0.8b, v0.8b # ENC_UMLSL_ASIMDDIFF_L 0x00,0xA0,0x20,0x2E = umlsl v0.8h, v0.8b, v0.8b # ENC_UMAXP_ASIMDSAME_ONLY 0x00,0xA4,0x20,0x2E = umaxp v0.8b, v0.8b, v0.8b # ENC_UMINP_ASIMDSAME_ONLY 0x00,0xAC,0x20,0x2E = uminp v0.8b, v0.8b, v0.8b # ENC_SQRDMULH_ASIMDSAME_ONLY 0x00,0xB4,0x20,0x2E = uminp v0.8b, v0.8b, v0.8b # ENC_NEG_ASIMDMISC_R 0x00,0xB8,0x20,0x2E = neg v0.8b, v0.8b # ENC_UMULL_ASIMDDIFF_L 0x00,0xC0,0x20,0x2E = umull v0.8h, v0.8b, v0.8b # ENC_FMAXNMP_ASIMDSAME_ONLY 0x00,0xC4,0x20,0x2E = fmaxnmp v0.2s, v0.2s, v0.2s # ENC_FMLAL2_ASIMDSAME_F 0x00,0xCC,0x20,0x2E = fmlal2 v0.2s, v0.2h, v0.2h # ENC_FADDP_ASIMDSAME_ONLY 0x00,0xD4,0x20,0x2E = faddp v0.2s, v0.2s, v0.2s # ENC_FMUL_ASIMDSAME_ONLY 0x00,0xDC,0x20,0x2E = fmul v0.2s, v0.2s, v0.2s # ENC_FCMGE_ASIMDSAME_ONLY 0x00,0xE4,0x20,0x2E = fcmge v0.2s, v0.2s, v0.2s # ENC_FACGE_ASIMDSAME_ONLY 0x00,0xEC,0x20,0x2E = facge v0.2s, v0.2s, v0.2s # ENC_FMAXP_ASIMDSAME_ONLY 0x00,0xF4,0x20,0x2E = fmaxp v0.2s, v0.2s, v0.2s # ENC_FDIV_ASIMDSAME_ONLY 0x00,0xFC,0x20,0x2E = fdiv v0.2s, v0.2s, v0.2s # ENC_SQXTUN_ASIMDMISC_N 0x00,0x28,0x21,0x2E = sqxtun v0.8b, v0.8h # ENC_SHLL_ASIMDMISC_S 0x00,0x38,0x21,0x2E = shll v0.8h, v0.8b, #8 # ENC_UQXTN_ASIMDMISC_N 0x00,0x48,0x21,0x2E = uqxtn v0.8b, v0.8h # ENC_FCVTXN_ASIMDMISC_N 0x00,0x68,0x21,0x2E = uqxtn v0.8b, v0.8h # ENC_FRINTA_ASIMDMISC_R 0x00,0x88,0x21,0x2E = frinta v0.2s, v0.2s # ENC_FRINTX_ASIMDMISC_R 0x00,0x98,0x21,0x2E = frintx v0.2s, v0.2s # ENC_FCVTNU_ASIMDMISC_R 0x00,0xA8,0x21,0x2E = fcvtnu v0.2s, v0.2s # ENC_FCVTMU_ASIMDMISC_R 0x00,0xB8,0x21,0x2E = fcvtmu v0.2s, v0.2s # ENC_FCVTAU_ASIMDMISC_R 0x00,0xC8,0x21,0x2E = fcvtau v0.2s, v0.2s # ENC_UCVTF_ASIMDMISC_R 0x00,0xD8,0x21,0x2E = ucvtf v0.2s, v0.2s # ENC_FRINT32X_ASIMDMISC_R 0x00,0xE8,0x21,0x2E = frint32x v0.2s, v0.2s # ENC_FRINT64X_ASIMDMISC_R 0x00,0xF8,0x21,0x2E = frint64x v0.2s, v0.2s # ENC_UADDLV_ASIMDALL_ONLY 0x00,0x38,0x30,0x2E = uaddlv h0, v0.8b # ENC_UMAXV_ASIMDALL_ONLY 0x00,0xA8,0x30,0x2E = umaxv b0, v0.8b # ENC_FMAXNMV_ASIMDALL_ONLY_SD 0x00,0xC8,0x30,0x2E = umaxv b0, v0.8b # ENC_FMAXV_ASIMDALL_ONLY_SD 0x00,0xF8,0x30,0x2E = umaxv b0, v0.8b # ENC_UMINV_ASIMDALL_ONLY 0x00,0xA8,0x31,0x2E = uminv b0, v0.8b # ENC_FMAXNMP_ASIMDSAMEFP16_ONLY 0x00,0x04,0x40,0x2E = fmaxnmp v0.4h, v0.4h, v0.4h # ENC_FADDP_ASIMDSAMEFP16_ONLY 0x00,0x14,0x40,0x2E = faddp v0.4h, v0.4h, v0.4h # ENC_FMUL_ASIMDSAMEFP16_ONLY 0x00,0x1C,0x40,0x2E = fmul v0.4h, v0.4h, v0.4h # ENC_FCMGE_ASIMDSAMEFP16_ONLY 0x00,0x24,0x40,0x2E = fcmge v0.4h, v0.4h, v0.4h # ENC_FACGE_ASIMDSAMEFP16_ONLY 0x00,0x2C,0x40,0x2E = facge v0.4h, v0.4h, v0.4h # ENC_FMAXP_ASIMDSAMEFP16_ONLY 0x00,0x34,0x40,0x2E = fmaxp v0.4h, v0.4h, v0.4h # ENC_FDIV_ASIMDSAMEFP16_ONLY 0x00,0x3C,0x40,0x2E = fdiv v0.4h, v0.4h, v0.4h # ENC_BFDOT_ASIMDSAME2_D 0x00,0xFC,0x40,0x2E = fdiv v0.4h, v0.4h, v0.4h # ENC_BSL_ASIMDSAME_ONLY 0x00,0x1C,0x60,0x2E = bsl v0.8b, v0.8b, v0.8b # ENC_RBIT_ASIMDMISC_R 0x00,0x58,0x60,0x2E = rbit v0.8b, v0.8b # ENC_FRINTA_ASIMDMISCFP16_R 0x00,0x88,0x79,0x2E = frinta v0.4h, v0.4h # ENC_FRINTX_ASIMDMISCFP16_R 0x00,0x98,0x79,0x2E = frintx v0.4h, v0.4h # ENC_FCVTNU_ASIMDMISCFP16_R 0x00,0xA8,0x79,0x2E = fcvtnu v0.4h, v0.4h # ENC_FCVTMU_ASIMDMISCFP16_R 0x00,0xB8,0x79,0x2E = fcvtmu v0.4h, v0.4h # ENC_FCVTAU_ASIMDMISCFP16_R 0x00,0xC8,0x79,0x2E = fcvtau v0.4h, v0.4h # ENC_UCVTF_ASIMDMISCFP16_R 0x00,0xD8,0x79,0x2E = ucvtf v0.4h, v0.4h # ENC_BIT_ASIMDSAME_ONLY 0x00,0x1C,0xA0,0x2E = bit v0.8b, v0.8b, v0.8b # ENC_FMINNMP_ASIMDSAME_ONLY 0x00,0xC4,0xA0,0x2E = fminnmp v0.2s, v0.2s, v0.2s # ENC_FCMGE_ASIMDMISC_FZ 0x00,0xC8,0xA0,0x2E = fcmge v0.2s, v0.2s, #0.0 # ENC_FMLSL2_ASIMDSAME_F 0x00,0xCC,0xA0,0x2E = fmlsl2 v0.2s, v0.2h, v0.2h # ENC_FABD_ASIMDSAME_ONLY 0x00,0xD4,0xA0,0x2E = fabd v0.2s, v0.2s, v0.2s # ENC_FCMLE_ASIMDMISC_FZ 0x00,0xD8,0xA0,0x2E = fcmle v0.2s, v0.2s, #0.0 # ENC_FCMGT_ASIMDSAME_ONLY 0x00,0xE4,0xA0,0x2E = fcmgt v0.2s, v0.2s, v0.2s # ENC_FACGT_ASIMDSAME_ONLY 0x00,0xEC,0xA0,0x2E = facgt v0.2s, v0.2s, v0.2s # ENC_FMINP_ASIMDSAME_ONLY 0x00,0xF4,0xA0,0x2E = fminp v0.2s, v0.2s, v0.2s # ENC_FNEG_ASIMDMISC_R 0x00,0xF8,0xA0,0x2E = fneg v0.2s, v0.2s # ENC_FRINTI_ASIMDMISC_R 0x00,0x98,0xA1,0x2E = frinti v0.2s, v0.2s # ENC_FCVTPU_ASIMDMISC_R 0x00,0xA8,0xA1,0x2E = fcvtpu v0.2s, v0.2s # ENC_FCVTZU_ASIMDMISC_R 0x00,0xB8,0xA1,0x2E = fcvtzu v0.2s, v0.2s # ENC_URSQRTE_ASIMDMISC_R 0x00,0xC8,0xA1,0x2E = ursqrte v0.2s, v0.2s # ENC_FRSQRTE_ASIMDMISC_R 0x00,0xD8,0xA1,0x2E = frsqrte v0.2s, v0.2s # ENC_FSQRT_ASIMDMISC_R 0x00,0xF8,0xA1,0x2E = fsqrt v0.2s, v0.2s # ENC_FMINNMV_ASIMDALL_ONLY_SD 0x00,0xC8,0xB0,0x2E = fsqrt v0.2s, v0.2s # ENC_FMINV_ASIMDALL_ONLY_SD 0x00,0xF8,0xB0,0x2E = fsqrt v0.2s, v0.2s # ENC_FMINNMP_ASIMDSAMEFP16_ONLY 0x00,0x04,0xC0,0x2E = fminnmp v0.4h, v0.4h, v0.4h # ENC_FABD_ASIMDSAMEFP16_ONLY 0x00,0x14,0xC0,0x2E = fabd v0.4h, v0.4h, v0.4h # ENC_FCMGT_ASIMDSAMEFP16_ONLY 0x00,0x24,0xC0,0x2E = fcmgt v0.4h, v0.4h, v0.4h # ENC_FACGT_ASIMDSAMEFP16_ONLY 0x00,0x2C,0xC0,0x2E = facgt v0.4h, v0.4h, v0.4h # ENC_FMINP_ASIMDSAMEFP16_ONLY 0x00,0x34,0xC0,0x2E = fminp v0.4h, v0.4h, v0.4h # ENC_BFMLAL_ASIMDSAME2_F_ 0x00,0xFC,0xC0,0x2E = fminp v0.4h, v0.4h, v0.4h # ENC_BIF_ASIMDSAME_ONLY 0x00,0x1C,0xE0,0x2E = bif v0.8b, v0.8b, v0.8b # ENC_FCMGE_ASIMDMISCFP16_FZ 0x00,0xC8,0xF8,0x2E = fcmge v0.4h, v0.4h, #0.0 # ENC_FCMLE_ASIMDMISCFP16_FZ 0x00,0xD8,0xF8,0x2E = fcmle v0.4h, v0.4h, #0.0 # ENC_FNEG_ASIMDMISCFP16_R 0x00,0xF8,0xF8,0x2E = fneg v0.4h, v0.4h # ENC_FRINTI_ASIMDMISCFP16_R 0x00,0x98,0xF9,0x2E = frinti v0.4h, v0.4h # ENC_FCVTPU_ASIMDMISCFP16_R 0x00,0xA8,0xF9,0x2E = fcvtpu v0.4h, v0.4h # ENC_FCVTZU_ASIMDMISCFP16_R 0x00,0xB8,0xF9,0x2E = fcvtzu v0.4h, v0.4h # ENC_FRSQRTE_ASIMDMISCFP16_R 0x00,0xD8,0xF9,0x2E = frsqrte v0.4h, v0.4h # ENC_FSQRT_ASIMDMISCFP16_R 0x00,0xF8,0xF9,0x2E = fsqrt v0.4h, v0.4h # ENC_MLA_ASIMDELEM_R 0x00,0x00,0x00,0x2F = fsqrt v0.4h, v0.4h # ENC_MVNI_ASIMDIMM_L_SL 0x00,0x04,0x00,0x2F = mvni v0.2s, #0 # ENC_BIC_ASIMDIMM_L_SL 0x00,0x14,0x00,0x2F = bic v0.2s, #0 # ENC_UMLAL_ASIMDELEM_L 0x00,0x20,0x00,0x2F = bic v0.2s, #0 # ENC_MLS_ASIMDELEM_R 0x00,0x40,0x00,0x2F = bic v0.2s, #0 # ENC_UMLSL_ASIMDELEM_L 0x00,0x60,0x00,0x2F = bic v0.2s, #0 # ENC_MVNI_ASIMDIMM_L_HL 0x00,0x84,0x00,0x2F = mvni v0.4h, #0 # ENC_FMULX_ASIMDELEM_RH_H 0x00,0x90,0x00,0x2F = fmulx v0.4h, v0.4h, v0.h[0] # ENC_BIC_ASIMDIMM_L_HL 0x00,0x94,0x00,0x2F = bic v0.4h, #0 # ENC_UMULL_ASIMDELEM_L 0x00,0xA0,0x00,0x2F = bic v0.4h, #0 # ENC_MVNI_ASIMDIMM_M_SM 0x00,0xC4,0x00,0x2F = mvni v0.2s, #0, msl #8 # ENC_SQRDMLAH_ASIMDELEM_R 0x00,0xD0,0x00,0x2F = mvni v0.2s, #0, msl #8 # ENC_UDOT_ASIMDELEM_D 0x00,0xE0,0x00,0x2F = mvni v0.2s, #0, msl #8 # ENC_MOVI_ASIMDIMM_D_DS 0x00,0xE4,0x00,0x2F = movi d0, #0000000000000000 # ENC_SQRDMLSH_ASIMDELEM_R 0x00,0xF0,0x00,0x2F = movi d0, #0000000000000000 # ENC_USHR_ASIMDSHF_R 0x00,0x04,0x08,0x2F = ushr v0.8b, v0.8b, #8 # ENC_USRA_ASIMDSHF_R 0x00,0x14,0x08,0x2F = usra v0.8b, v0.8b, #8 # ENC_URSHR_ASIMDSHF_R 0x00,0x24,0x08,0x2F = urshr v0.8b, v0.8b, #8 # ENC_URSRA_ASIMDSHF_R 0x00,0x34,0x08,0x2F = ursra v0.8b, v0.8b, #8 # ENC_SRI_ASIMDSHF_R 0x00,0x44,0x08,0x2F = sri v0.8b, v0.8b, #8 # ENC_SLI_ASIMDSHF_R 0x00,0x54,0x08,0x2F = sli v0.8b, v0.8b, #0 # ENC_SQSHLU_ASIMDSHF_R 0x00,0x64,0x08,0x2F = sqshlu v0.8b, v0.8b, #0 # ENC_UQSHL_ASIMDSHF_R 0x00,0x74,0x08,0x2F = uqshl v0.8b, v0.8b, #0 # ENC_SQSHRUN_ASIMDSHF_N 0x00,0x84,0x08,0x2F = sqshrun v0.8b, v0.8h, #8 # ENC_SQRSHRUN_ASIMDSHF_N 0x00,0x8C,0x08,0x2F = sqrshrun v0.8b, v0.8h, #8 # ENC_UQSHRN_ASIMDSHF_N 0x00,0x94,0x08,0x2F = uqshrn v0.8b, v0.8h, #8 # ENC_UQRSHRN_ASIMDSHF_N 0x00,0x9C,0x08,0x2F = uqrshrn v0.8b, v0.8h, #8 # ENC_UXTL_USHLL_ASIMDSHF_L 0x00,0xA4,0x08,0x2F = ushll v0.8h, v0.8b, #0 # ENC_UCVTF_ASIMDSHF_C 0x00,0xE4,0x08,0x2F = ushll v0.8h, v0.8b, #0 # ENC_FCVTZU_ASIMDSHF_C 0x00,0xFC,0x08,0x2F = ushll v0.8h, v0.8b, #0 # ENC_USHLL_ASIMDSHF_L 0x00,0xA4,0x09,0x2F = ushll v0.8h, v0.8b, #1 # ENC_FCMLA_ASIMDELEM_C_H 0x00,0x10,0x40,0x2F = fcmla v0.4h, v0.4h, v0.h[0], #0 # ENC_FCMLA_ASIMDELEM_C_S 0x00,0x10,0x80,0x2F = fcmla v0.4h, v0.4h, v0.h[0], #0 # ENC_FMLAL2_ASIMDELEM_LH 0x00,0x80,0x80,0x2F = fmlal2 v0.2s, v0.2h, v0.h[0] # ENC_FMULX_ASIMDELEM_R_SD 0x00,0x90,0x80,0x2F = fmulx v0.2s, v0.2s, v0.s[0] # ENC_FMLSL2_ASIMDELEM_LH 0x00,0xC0,0x80,0x2F = fmlsl2 v0.2s, v0.2h, v0.h[0] # ENC_ADDS_32S_ADDSUB_IMM 0x00,0x00,0x00,0x31 = adds w0, w0, #0 # ENC_CMN_ADDS_32S_ADDSUB_IMM 0x1F,0x00,0x00,0x31 = cmn w0, #0 # ENC_ORR_32_LOG_IMM 0x00,0x00,0x00,0x32 = orr w0, w0, #0x1 # ENC_MOV_ORR_32_LOG_IMM 0xE0,0x83,0x00,0x32 = mov w0, #65537 # ENC_BFXIL_BFM_32M_BITFIELD 0x00,0x00,0x00,0x33 = bfxil w0, w0, #0, #1 # ENC_BFI_BFM_32M_BITFIELD 0x00,0x00,0x01,0x33 = bfi w0, w0, #31, #1 # ENC_BFC_BFM_32M_BITFIELD 0xE0,0x03,0x01,0x33 = bfc w0, #31, #1 # ENC_CBZ_32_COMPBRANCH 0x00,0x00,0x00,0x34 = cbz w0, 0x0 # ENC_CBNZ_32_COMPBRANCH 0x00,0x00,0x00,0x35 = cbnz w0, 0x0 # ENC_TBZ_ONLY_TESTBRANCH 0x00,0x00,0x00,0x36 = tbz w0, #0, 0x0 # ENC_TBNZ_ONLY_TESTBRANCH 0x00,0x00,0x00,0x37 = tbnz w0, #0, 0x0 # ENC_STURB_32_LDST_UNSCALED 0x00,0x00,0x00,0x38 = sturb w0, [x0] # ENC_STRB_32_LDST_IMMPOST 0x00,0x04,0x00,0x38 = strb w0, [x0], #0 # ENC_STTRB_32_LDST_UNPRIV 0x00,0x08,0x00,0x38 = sttrb w0, [x0] # ENC_STRB_32_LDST_IMMPRE 0x00,0x0C,0x00,0x38 = strb w0, [x0, #0]! # ENC_LDADDB_32_MEMOP 0x00,0x00,0x20,0x38 = ldaddb w0, w0, [x0] # ENC_STADDB_LDADDB_32_MEMOP 0x1F,0x00,0x20,0x38 = staddb w0, [x0] # ENC_STRB_32B_LDST_REGOFF 0x00,0x08,0x20,0x38 = staddb w0, [x0] # ENC_LDCLRB_32_MEMOP 0x00,0x10,0x20,0x38 = ldclrb w0, w0, [x0] # ENC_STCLRB_LDCLRB_32_MEMOP 0x1F,0x10,0x20,0x38 = stclrb w0, [x0] # ENC_LDEORB_32_MEMOP 0x00,0x20,0x20,0x38 = ldeorb w0, w0, [x0] # ENC_STEORB_LDEORB_32_MEMOP 0x1F,0x20,0x20,0x38 = steorb w0, [x0] # ENC_LDSETB_32_MEMOP 0x00,0x30,0x20,0x38 = ldsetb w0, w0, [x0] # ENC_STSETB_LDSETB_32_MEMOP 0x1F,0x30,0x20,0x38 = stsetb w0, [x0] # ENC_LDSMAXB_32_MEMOP 0x00,0x40,0x20,0x38 = ldsmaxb w0, w0, [x0] # ENC_STSMAXB_LDSMAXB_32_MEMOP 0x1F,0x40,0x20,0x38 = stsmaxb w0, [x0] # ENC_LDSMINB_32_MEMOP 0x00,0x50,0x20,0x38 = ldsminb w0, w0, [x0] # ENC_STSMINB_LDSMINB_32_MEMOP 0x1F,0x50,0x20,0x38 = stsminb w0, [x0] # ENC_LDUMAXB_32_MEMOP 0x00,0x60,0x20,0x38 = ldumaxb w0, w0, [x0] # ENC_STUMAXB_LDUMAXB_32_MEMOP 0x1F,0x60,0x20,0x38 = stumaxb w0, [x0] # ENC_LDUMINB_32_MEMOP 0x00,0x70,0x20,0x38 = lduminb w0, w0, [x0] # ENC_STUMINB_LDUMINB_32_MEMOP 0x1F,0x70,0x20,0x38 = stuminb w0, [x0] # ENC_SWPB_32_MEMOP 0x00,0x80,0x20,0x38 = swpb w0, w0, [x0] # ENC_LDURB_32_LDST_UNSCALED 0x00,0x00,0x40,0x38 = ldurb w0, [x0] # ENC_LDRB_32_LDST_IMMPOST 0x00,0x04,0x40,0x38 = ldurb w0, [x0] # ENC_LDTRB_32_LDST_UNPRIV 0x00,0x08,0x40,0x38 = ldurb w0, [x0] # ENC_LDRB_32_LDST_IMMPRE 0x00,0x0C,0x40,0x38 = ldurb w0, [x0] # ENC_LDADDLB_32_MEMOP 0x00,0x00,0x60,0x38 = ldaddlb w0, w0, [x0] # ENC_STADDLB_LDADDLB_32_MEMOP 0x1F,0x00,0x60,0x38 = staddlb w0, [x0] # ENC_LDRB_32B_LDST_REGOFF 0x00,0x08,0x60,0x38 = staddlb w0, [x0] # ENC_LDCLRLB_32_MEMOP 0x00,0x10,0x60,0x38 = ldclrlb w0, w0, [x0] # ENC_STCLRLB_LDCLRLB_32_MEMOP 0x1F,0x10,0x60,0x38 = stclrlb w0, [x0] # ENC_LDEORLB_32_MEMOP 0x00,0x20,0x60,0x38 = ldeorlb w0, w0, [x0] # ENC_STEORLB_LDEORLB_32_MEMOP 0x1F,0x20,0x60,0x38 = steorlb w0, [x0] # ENC_LDSETLB_32_MEMOP 0x00,0x30,0x60,0x38 = ldsetlb w0, w0, [x0] # ENC_STSETLB_LDSETLB_32_MEMOP 0x1F,0x30,0x60,0x38 = stsetlb w0, [x0] # ENC_LDSMAXLB_32_MEMOP 0x00,0x40,0x60,0x38 = ldsmaxlb w0, w0, [x0] # ENC_STSMAXLB_LDSMAXLB_32_MEMOP 0x1F,0x40,0x60,0x38 = stsmaxlb w0, [x0] # ENC_LDSMINLB_32_MEMOP 0x00,0x50,0x60,0x38 = ldsminlb w0, w0, [x0] # ENC_STSMINLB_LDSMINLB_32_MEMOP 0x1F,0x50,0x60,0x38 = stsminlb w0, [x0] # ENC_LDUMAXLB_32_MEMOP 0x00,0x60,0x60,0x38 = ldumaxlb w0, w0, [x0] # ENC_STUMAXLB_LDUMAXLB_32_MEMOP 0x1F,0x60,0x60,0x38 = stumaxlb w0, [x0] # ENC_LDUMINLB_32_MEMOP 0x00,0x70,0x60,0x38 = lduminlb w0, w0, [x0] # ENC_STUMINLB_LDUMINLB_32_MEMOP 0x1F,0x70,0x60,0x38 = stuminlb w0, [x0] # ENC_SWPLB_32_MEMOP 0x00,0x80,0x60,0x38 = swplb w0, w0, [x0] # ENC_LDURSB_64_LDST_UNSCALED 0x00,0x00,0x80,0x38 = ldursb x0, [x0] # ENC_LDRSB_64_LDST_IMMPOST 0x00,0x04,0x80,0x38 = ldrsb x0, [x0], #0 # ENC_LDTRSB_64_LDST_UNPRIV 0x00,0x08,0x80,0x38 = ldtrsb x0, [x0] # ENC_LDRSB_64_LDST_IMMPRE 0x00,0x0C,0x80,0x38 = ldrsb x0, [x0, #0]! # ENC_LDADDAB_32_MEMOP 0x00,0x00,0xA0,0x38 = ldaddab w0, w0, [x0] # ENC_LDRSB_64B_LDST_REGOFF 0x00,0x08,0xA0,0x38 = ldaddab w0, w0, [x0] # ENC_LDCLRAB_32_MEMOP 0x00,0x10,0xA0,0x38 = ldclrab w0, w0, [x0] # ENC_LDEORAB_32_MEMOP 0x00,0x20,0xA0,0x38 = ldeorab w0, w0, [x0] # ENC_LDSETAB_32_MEMOP 0x00,0x30,0xA0,0x38 = ldsetab w0, w0, [x0] # ENC_LDSMAXAB_32_MEMOP 0x00,0x40,0xA0,0x38 = ldsmaxab w0, w0, [x0] # ENC_LDSMINAB_32_MEMOP 0x00,0x50,0xA0,0x38 = ldsminab w0, w0, [x0] # ENC_LDUMAXAB_32_MEMOP 0x00,0x60,0xA0,0x38 = ldumaxab w0, w0, [x0] # ENC_LDUMINAB_32_MEMOP 0x00,0x70,0xA0,0x38 = lduminab w0, w0, [x0] # ENC_SWPAB_32_MEMOP 0x00,0x80,0xA0,0x38 = swpab w0, w0, [x0] # ENC_LDAPRB_32L_MEMOP 0x00,0xC0,0xBF,0x38 = ldaprb w0, [x0] # ENC_LDURSB_32_LDST_UNSCALED 0x00,0x00,0xC0,0x38 = ldursb w0, [x0] # ENC_LDRSB_32_LDST_IMMPOST 0x00,0x04,0xC0,0x38 = ldursb w0, [x0] # ENC_LDTRSB_32_LDST_UNPRIV 0x00,0x08,0xC0,0x38 = ldursb w0, [x0] # ENC_LDRSB_32_LDST_IMMPRE 0x00,0x0C,0xC0,0x38 = ldursb w0, [x0] # ENC_LDADDALB_32_MEMOP 0x00,0x00,0xE0,0x38 = ldaddalb w0, w0, [x0] # ENC_LDRSB_32B_LDST_REGOFF 0x00,0x08,0xE0,0x38 = ldaddalb w0, w0, [x0] # ENC_LDCLRALB_32_MEMOP 0x00,0x10,0xE0,0x38 = ldclralb w0, w0, [x0] # ENC_LDEORALB_32_MEMOP 0x00,0x20,0xE0,0x38 = ldeoralb w0, w0, [x0] # ENC_LDSETALB_32_MEMOP 0x00,0x30,0xE0,0x38 = ldsetalb w0, w0, [x0] # ENC_LDSMAXALB_32_MEMOP 0x00,0x40,0xE0,0x38 = ldsmaxalb w0, w0, [x0] # ENC_LDSMINALB_32_MEMOP 0x00,0x50,0xE0,0x38 = ldsminalb w0, w0, [x0] # ENC_LDUMAXALB_32_MEMOP 0x00,0x60,0xE0,0x38 = ldumaxalb w0, w0, [x0] # ENC_LDUMINALB_32_MEMOP 0x00,0x70,0xE0,0x38 = lduminalb w0, w0, [x0] # ENC_SWPALB_32_MEMOP 0x00,0x80,0xE0,0x38 = swpalb w0, w0, [x0] # ENC_STRB_32_LDST_POS 0x00,0x00,0x00,0x39 = strb w0, [x0] # ENC_LDRB_32_LDST_POS 0x00,0x00,0x40,0x39 = ldrb w0, [x0] # ENC_LDRSB_64_LDST_POS 0x00,0x00,0x80,0x39 = ldrsb x0, [x0] # ENC_LDRSB_32_LDST_POS 0x00,0x00,0xC0,0x39 = ldrsb w0, [x0] # ENC_ADCS_32_ADDSUB_CARRY 0x00,0x00,0x00,0x3A = adcs w0, w0, w0 # ENC_SETF8_ONLY_SETF 0x0D,0x08,0x00,0x3A = setf8 w0 # ENC_SETF16_ONLY_SETF 0x0D,0x48,0x00,0x3A = setf16 w0 # ENC_CCMN_32_CONDCMP_REG 0x00,0x00,0x40,0x3A = ccmn w0, w0, #0, eq # ENC_CCMN_32_CONDCMP_IMM 0x00,0x08,0x40,0x3A = ccmn w0, #0, #0, eq # ENC_STUR_B_LDST_UNSCALED 0x00,0x00,0x00,0x3C = stur b0, [x0] # ENC_STR_B_LDST_IMMPOST 0x00,0x04,0x00,0x3C = str b0, [x0], #0 # ENC_STR_B_LDST_IMMPRE 0x00,0x0C,0x00,0x3C = str b0, [x0, #0]! # ENC_STR_B_LDST_REGOFF 0x00,0x08,0x20,0x3C = str b0, [x0, #0]! # ENC_LDUR_B_LDST_UNSCALED 0x00,0x00,0x40,0x3C = ldur b0, [x0] # ENC_LDR_B_LDST_IMMPOST 0x00,0x04,0x40,0x3C = ldr b0, [x0], #0 # ENC_LDR_B_LDST_IMMPRE 0x00,0x0C,0x40,0x3C = ldr b0, [x0, #0]! # ENC_LDR_B_LDST_REGOFF 0x00,0x08,0x60,0x3C = ldr b0, [x0, #0]! # ENC_STUR_Q_LDST_UNSCALED 0x00,0x00,0x80,0x3C = stur q0, [x0] # ENC_STR_Q_LDST_IMMPOST 0x00,0x04,0x80,0x3C = str q0, [x0], #0 # ENC_STR_Q_LDST_IMMPRE 0x00,0x0C,0x80,0x3C = str q0, [x0, #0]! # ENC_STR_Q_LDST_REGOFF 0x00,0x08,0xA0,0x3C = str q0, [x0, #0]! # ENC_LDUR_Q_LDST_UNSCALED 0x00,0x00,0xC0,0x3C = ldur q0, [x0] # ENC_LDR_Q_LDST_IMMPOST 0x00,0x04,0xC0,0x3C = ldr q0, [x0], #0 # ENC_LDR_Q_LDST_IMMPRE 0x00,0x0C,0xC0,0x3C = ldr q0, [x0, #0]! # ENC_LDR_Q_LDST_REGOFF 0x00,0x08,0xE0,0x3C = ldr q0, [x0, #0]! # ENC_STR_B_LDST_POS 0x00,0x00,0x00,0x3D = str b0, [x0] # ENC_LDR_B_LDST_POS 0x00,0x00,0x40,0x3D = ldr b0, [x0] # ENC_STR_Q_LDST_POS 0x00,0x00,0x80,0x3D = str q0, [x0] # ENC_LDR_Q_LDST_POS 0x00,0x00,0xC0,0x3D = ldr q0, [x0] # ENC_SDOT_Z_ZZZ_ 0x00,0x00,0x00,0x44 = ldr q0, [x0] # ENC_UDOT_Z_ZZZ_ 0x00,0x04,0x00,0x44 = ldr q0, [x0] # ENC_USDOT_Z_ZZZ_S 0x00,0x78,0x80,0x44 = ldr q0, [x0] # ENC_SDOT_Z_ZZZI_S 0x00,0x00,0xA0,0x44 = ldr q0, [x0] # ENC_UDOT_Z_ZZZI_S 0x00,0x04,0xA0,0x44 = ldr q0, [x0] # ENC_USDOT_Z_ZZZI_S 0x00,0x18,0xA0,0x44 = ldr q0, [x0] # ENC_SUDOT_Z_ZZZI_S 0x00,0x1C,0xA0,0x44 = ldr q0, [x0] # ENC_SDOT_Z_ZZZI_D 0x00,0x00,0xE0,0x44 = ldr q0, [x0] # ENC_UDOT_Z_ZZZI_D 0x00,0x04,0xE0,0x44 = ldr q0, [x0] # ENC_SMMLA_Z_ZZZ_ 0x00,0x98,0x00,0x45 = ldr q0, [x0] # ENC_USMMLA_Z_ZZZ_ 0x00,0x98,0x80,0x45 = ldr q0, [x0] # ENC_UMMLA_Z_ZZZ_ 0x00,0x98,0xC0,0x45 = ldr q0, [x0] # ENC_STXRH_SR32_LDSTEXCL 0x00,0x7C,0x00,0x48 = stxrh w0, w0, [x0] # ENC_STLXRH_SR32_LDSTEXCL 0x00,0xFC,0x00,0x48 = stlxrh w0, w0, [x0] # ENC_CASP_CP64_LDSTEXCL 0x00,0x7C,0x20,0x48 = casp x0, x1, x0, x1, [x0] # ENC_CASPL_CP64_LDSTEXCL 0x00,0xFC,0x20,0x48 = caspl x0, x1, x0, x1, [x0] # ENC_LDXRH_LR32_LDSTEXCL 0x00,0x7C,0x5F,0x48 = ldxrh w0, [x0] # ENC_LDAXRH_LR32_LDSTEXCL 0x00,0xFC,0x5F,0x48 = ldaxrh w0, [x0] # ENC_CASPA_CP64_LDSTEXCL 0x00,0x7C,0x60,0x48 = caspa x0, x1, x0, x1, [x0] # ENC_CASPAL_CP64_LDSTEXCL 0x00,0xFC,0x60,0x48 = caspal x0, x1, x0, x1, [x0] # ENC_STLLRH_SL32_LDSTEXCL 0x00,0x7C,0x9F,0x48 = stllrh w0, [x0] # ENC_STLRH_SL32_LDSTEXCL 0x00,0xFC,0x9F,0x48 = stlrh w0, [x0] # ENC_CASH_C32_LDSTEXCL 0x00,0x7C,0xA0,0x48 = cash w0, w0, [x0] # ENC_CASLH_C32_LDSTEXCL 0x00,0xFC,0xA0,0x48 = caslh w0, w0, [x0] # ENC_LDLARH_LR32_LDSTEXCL 0x00,0x7C,0xDF,0x48 = ldlarh w0, [x0] # ENC_LDARH_LR32_LDSTEXCL 0x00,0xFC,0xDF,0x48 = ldarh w0, [x0] # ENC_CASAH_C32_LDSTEXCL 0x00,0x7C,0xE0,0x48 = casah w0, w0, [x0] # ENC_CASALH_C32_LDSTEXCL 0x00,0xFC,0xE0,0x48 = casalh w0, w0, [x0] # ENC_EOR_32_LOG_SHIFT 0x00,0x00,0x00,0x4A = eor w0, w0, w0 # ENC_EON_32_LOG_SHIFT 0x00,0x00,0x20,0x4A = eon w0, w0, w0 # ENC_SUB_32_ADDSUB_SHIFT 0x00,0x00,0x00,0x4B = sub w0, w0, w0 # ENC_NEG_SUB_32_ADDSUB_SHIFT 0xE0,0x03,0x00,0x4B = neg w0, w0 # ENC_SUB_32_ADDSUB_EXT 0x00,0x00,0x20,0x4B = sub w0, w0, w0, uxtb # ENC_MOV_INS_ASIMDINS_IR_R 0x00,0x1C,0x00,0x4E = sub w0, w0, w0, uxtb # ENC_SMOV_ASIMDINS_X_X 0x00,0x2C,0x00,0x4E = sub w0, w0, w0, uxtb # ENC_MOV_UMOV_ASIMDINS_X_X 0x00,0x3C,0x08,0x4E = mov x0, v0.d[0] # ENC_AESE_B_CRYPTOAES 0x00,0x48,0x28,0x4E = aese v0.16b, v0.16b # ENC_AESD_B_CRYPTOAES 0x00,0x58,0x28,0x4E = aesd v0.16b, v0.16b # ENC_AESMC_B_CRYPTOAES 0x00,0x68,0x28,0x4E = aesmc v0.16b, v0.16b # ENC_AESIMC_B_CRYPTOAES 0x00,0x78,0x28,0x4E = aesimc v0.16b, v0.16b # ENC_SMMLA_ASIMDSAME2_G 0x00,0xA4,0x80,0x4E = aesimc v0.16b, v0.16b # ENC_USMMLA_ASIMDSAME2_G 0x00,0xAC,0x80,0x4E = aesimc v0.16b, v0.16b # ENC_SUB_32_ADDSUB_IMM 0x00,0x00,0x00,0x51 = sub w0, w0, #0 # ENC_EOR_32_LOG_IMM 0x00,0x00,0x00,0x52 = eor w0, w0, #0x1 # ENC_MOV_MOVZ_32_MOVEWIDE 0x00,0x00,0x80,0x52 = mov w0, #0 # ENC_MOVZ_32_MOVEWIDE 0x00,0x00,0xA0,0x52 = movz w0, #0, lsl #16 # ENC_UBFX_UBFM_32M_BITFIELD 0x00,0x00,0x00,0x53 = ubfx w0, w0, #0, #1 # ENC_UXTB_UBFM_32M_BITFIELD 0x00,0x1C,0x00,0x53 = uxtb w0, w0 # ENC_UXTH_UBFM_32M_BITFIELD 0x00,0x3C,0x00,0x53 = uxth w0, w0 # ENC_LSR_UBFM_32M_BITFIELD 0x00,0x7C,0x00,0x53 = lsr w0, w0, #0 # ENC_LSL_UBFM_32M_BITFIELD 0x00,0x00,0x01,0x53 = lsl w0, w0, #31 # ENC_UBFIZ_UBFM_32M_BITFIELD 0x00,0x00,0x02,0x53 = ubfiz w0, w0, #30, #1 # ENC_B_ONLY_CONDBRANCH 0x00,0x00,0x00,0x54 = b.eq 0x0 # ENC_LDR_64_LOADLIT 0x00,0x00,0x00,0x58 = ldr x0, #0 # ENC_STLURH_32_LDAPSTL_UNSCALED 0x00,0x00,0x00,0x59 = stlurh w0, [x0] # ENC_LDAPURH_32_LDAPSTL_UNSCALED 0x00,0x00,0x40,0x59 = ldapurh w0, [x0] # ENC_LDAPURSH_64_LDAPSTL_UNSCALED 0x00,0x00,0x80,0x59 = ldapursh x0, [x0] # ENC_LDAPURSH_32_LDAPSTL_UNSCALED 0x00,0x00,0xC0,0x59 = ldapursh w0, [x0] # ENC_SBC_32_ADDSUB_CARRY 0x00,0x00,0x00,0x5A = sbc w0, w0, w0 # ENC_NGC_SBC_32_ADDSUB_CARRY 0xE0,0x03,0x00,0x5A = ngc w0, w0 # ENC_CINV_CSINV_32_CONDSEL 0x00,0x00,0x80,0x5A = cinv w0, w0, ne # ENC_CSINV_32_CONDSEL 0x20,0x00,0x80,0x5A = csinv w0, w1, w0, eq # ENC_CNEG_CSNEG_32_CONDSEL 0x00,0x04,0x80,0x5A = cneg w0, w0, ne # ENC_CSNEG_32_CONDSEL 0x20,0x04,0x80,0x5A = csneg w0, w1, w0, eq # ENC_CSETM_CSINV_32_CONDSEL 0xE0,0x03,0x9F,0x5A = csetm w0, ne # ENC_RBIT_32_DP_1SRC 0x00,0x00,0xC0,0x5A = rbit w0, w0 # ENC_REV16_32_DP_1SRC 0x00,0x04,0xC0,0x5A = rev16 w0, w0 # ENC_REV_32_DP_1SRC 0x00,0x08,0xC0,0x5A = rev w0, w0 # ENC_CLZ_32_DP_1SRC 0x00,0x10,0xC0,0x5A = clz w0, w0 # ENC_CLS_32_DP_1SRC 0x00,0x14,0xC0,0x5A = cls w0, w0 # ENC_LDR_D_LOADLIT 0x00,0x00,0x00,0x5C = ldr d0, 0x0 # ENC_SHA1C_QSV_CRYPTOSHA3 0x00,0x00,0x00,0x5E = sha1c q0, s0, v0.4s # ENC_SHA1P_QSV_CRYPTOSHA3 0x00,0x10,0x00,0x5E = sha1p q0, s0, v0.4s # ENC_SHA1M_QSV_CRYPTOSHA3 0x00,0x20,0x00,0x5E = sha1m q0, s0, v0.4s # ENC_SHA1SU0_VVV_CRYPTOSHA3 0x00,0x30,0x00,0x5E = sha1su0 v0.4s, v0.4s, v0.4s # ENC_SHA256H_QQV_CRYPTOSHA3 0x00,0x40,0x00,0x5E = sha256h q0, q0, v0.4s # ENC_SHA256H2_QQV_CRYPTOSHA3 0x00,0x50,0x00,0x5E = sha256h2 q0, q0, v0.4s # ENC_SHA256SU1_VVV_CRYPTOSHA3 0x00,0x60,0x00,0x5E = sha256su1 v0.4s, v0.4s, v0.4s # ENC_MOV_DUP_ASISDONE_ONLY 0x00,0x04,0x01,0x5E = mov b0, v0.b[0] # ENC_SQADD_ASISDSAME_ONLY 0x00,0x0C,0x20,0x5E = sqadd b0, b0, b0 # ENC_SQSUB_ASISDSAME_ONLY 0x00,0x2C,0x20,0x5E = sqsub b0, b0, b0 # ENC_CMGT_ASISDSAME_ONLY 0x00,0x34,0x20,0x5E = sqsub b0, b0, b0 # ENC_SUQADD_ASISDMISC_R 0x00,0x38,0x20,0x5E = suqadd b0, b0 # ENC_CMGE_ASISDSAME_ONLY 0x00,0x3C,0x20,0x5E = suqadd b0, b0 # ENC_SSHL_ASISDSAME_ONLY 0x00,0x44,0x20,0x5E = suqadd b0, b0 # ENC_SQSHL_ASISDSAME_ONLY 0x00,0x4C,0x20,0x5E = sqshl b0, b0, b0 # ENC_SRSHL_ASISDSAME_ONLY 0x00,0x54,0x20,0x5E = sqshl b0, b0, b0 # ENC_SQRSHL_ASISDSAME_ONLY 0x00,0x5C,0x20,0x5E = sqrshl b0, b0, b0 # ENC_SQABS_ASISDMISC_R 0x00,0x78,0x20,0x5E = sqabs b0, b0 # ENC_ADD_ASISDSAME_ONLY 0x00,0x84,0x20,0x5E = sqabs b0, b0 # ENC_CMGT_ASISDMISC_Z 0x00,0x88,0x20,0x5E = sqabs b0, b0 # ENC_CMTST_ASISDSAME_ONLY 0x00,0x8C,0x20,0x5E = sqabs b0, b0 # ENC_SQDMLAL_ASISDDIFF_ONLY 0x00,0x90,0x20,0x5E = sqabs b0, b0 # ENC_CMEQ_ASISDMISC_Z 0x00,0x98,0x20,0x5E = sqabs b0, b0 # ENC_CMLT_ASISDMISC_Z 0x00,0xA8,0x20,0x5E = sqabs b0, b0 # ENC_SQDMLSL_ASISDDIFF_ONLY 0x00,0xB0,0x20,0x5E = sqabs b0, b0 # ENC_SQDMULH_ASISDSAME_ONLY 0x00,0xB4,0x20,0x5E = sqabs b0, b0 # ENC_ABS_ASISDMISC_R 0x00,0xB8,0x20,0x5E = sqabs b0, b0 # ENC_SQDMULL_ASISDDIFF_ONLY 0x00,0xD0,0x20,0x5E = sqabs b0, b0 # ENC_FMULX_ASISDSAME_ONLY 0x00,0xDC,0x20,0x5E = fmulx s0, s0, s0 # ENC_FCMEQ_ASISDSAME_ONLY 0x00,0xE4,0x20,0x5E = fcmeq s0, s0, s0 # ENC_FRECPS_ASISDSAME_ONLY 0x00,0xFC,0x20,0x5E = frecps s0, s0, s0 # ENC_SQXTN_ASISDMISC_N 0x00,0x48,0x21,0x5E = sqxtn b0, h0 # ENC_FCVTNS_ASISDMISC_R 0x00,0xA8,0x21,0x5E = fcvtns s0, s0 # ENC_FCVTMS_ASISDMISC_R 0x00,0xB8,0x21,0x5E = fcvtms s0, s0 # ENC_FCVTAS_ASISDMISC_R 0x00,0xC8,0x21,0x5E = fcvtas s0, s0 # ENC_SCVTF_ASISDMISC_R 0x00,0xD8,0x21,0x5E = scvtf s0, s0 # ENC_SHA1H_SS_CRYPTOSHA2 0x00,0x08,0x28,0x5E = sha1h s0, s0 # ENC_SHA1SU1_VV_CRYPTOSHA2 0x00,0x18,0x28,0x5E = sha1su1 v0.4s, v0.4s # ENC_SHA256SU0_VV_CRYPTOSHA2 0x00,0x28,0x28,0x5E = sha256su0 v0.4s, v0.4s # ENC_FMAXNMP_ASISDPAIR_ONLY_H 0x00,0xC8,0x30,0x5E = fmaxnmp h0, v0.2h # ENC_FADDP_ASISDPAIR_ONLY_H 0x00,0xD8,0x30,0x5E = faddp h0, v0.2h # ENC_FMAXP_ASISDPAIR_ONLY_H 0x00,0xF8,0x30,0x5E = fmaxp h0, v0.2h # ENC_ADDP_ASISDPAIR_ONLY 0x00,0xB8,0x31,0x5E = fmaxp h0, v0.2h # ENC_FMULX_ASISDSAMEFP16_ONLY 0x00,0x1C,0x40,0x5E = fmulx h0, h0, h0 # ENC_FCMEQ_ASISDSAMEFP16_ONLY 0x00,0x24,0x40,0x5E = fcmeq h0, h0, h0 # ENC_FRECPS_ASISDSAMEFP16_ONLY 0x00,0x3C,0x40,0x5E = frecps h0, h0, h0 # ENC_FCVTNS_ASISDMISCFP16_R 0x00,0xA8,0x79,0x5E = fcvtns h0, h0 # ENC_FCVTMS_ASISDMISCFP16_R 0x00,0xB8,0x79,0x5E = fcvtms h0, h0 # ENC_FCVTAS_ASISDMISCFP16_R 0x00,0xC8,0x79,0x5E = fcvtas h0, h0 # ENC_SCVTF_ASISDMISCFP16_R 0x00,0xD8,0x79,0x5E = scvtf h0, h0 # ENC_FCMGT_ASISDMISC_FZ 0x00,0xC8,0xA0,0x5E = fcmgt s0, s0, #0.0 # ENC_FCMEQ_ASISDMISC_FZ 0x00,0xD8,0xA0,0x5E = fcmeq s0, s0, #0.0 # ENC_FCMLT_ASISDMISC_FZ 0x00,0xE8,0xA0,0x5E = fcmlt s0, s0, #0.0 # ENC_FRSQRTS_ASISDSAME_ONLY 0x00,0xFC,0xA0,0x5E = frsqrts s0, s0, s0 # ENC_FCVTPS_ASISDMISC_R 0x00,0xA8,0xA1,0x5E = fcvtps s0, s0 # ENC_FCVTZS_ASISDMISC_R 0x00,0xB8,0xA1,0x5E = fcvtzs s0, s0 # ENC_FRECPE_ASISDMISC_R 0x00,0xD8,0xA1,0x5E = frecpe s0, s0 # ENC_FRECPX_ASISDMISC_R 0x00,0xF8,0xA1,0x5E = frecpx s0, s0 # ENC_FMINNMP_ASISDPAIR_ONLY_H 0x00,0xC8,0xB0,0x5E = fminnmp h0, v0.2h # ENC_FMINP_ASISDPAIR_ONLY_H 0x00,0xF8,0xB0,0x5E = fminp h0, v0.2h # ENC_FRSQRTS_ASISDSAMEFP16_ONLY 0x00,0x3C,0xC0,0x5E = frsqrts h0, h0, h0 # ENC_FCMGT_ASISDMISCFP16_FZ 0x00,0xC8,0xF8,0x5E = fcmgt h0, h0, #0.0 # ENC_FCMEQ_ASISDMISCFP16_FZ 0x00,0xD8,0xF8,0x5E = fcmeq h0, h0, #0.0 # ENC_FCMLT_ASISDMISCFP16_FZ 0x00,0xE8,0xF8,0x5E = fcmlt h0, h0, #0.0 # ENC_FCVTPS_ASISDMISCFP16_R 0x00,0xA8,0xF9,0x5E = fcvtps h0, h0 # ENC_FCVTZS_ASISDMISCFP16_R 0x00,0xB8,0xF9,0x5E = fcvtzs h0, h0 # ENC_FRECPE_ASISDMISCFP16_R 0x00,0xD8,0xF9,0x5E = frecpe h0, h0 # ENC_FRECPX_ASISDMISCFP16_R 0x00,0xF8,0xF9,0x5E = frecpx h0, h0 # ENC_FMLA_ASISDELEM_RH_H 0x00,0x10,0x00,0x5F = fmla h0, h0, v0.h[0] # ENC_SQDMLAL_ASISDELEM_L 0x00,0x30,0x00,0x5F = fmla h0, h0, v0.h[0] # ENC_FMLS_ASISDELEM_RH_H 0x00,0x50,0x00,0x5F = fmls h0, h0, v0.h[0] # ENC_SQDMLSL_ASISDELEM_L 0x00,0x70,0x00,0x5F = fmls h0, h0, v0.h[0] # ENC_FMUL_ASISDELEM_RH_H 0x00,0x90,0x00,0x5F = fmul h0, h0, v0.h[0] # ENC_SQDMULL_ASISDELEM_L 0x00,0xB0,0x00,0x5F = fmul h0, h0, v0.h[0] # ENC_SQDMULH_ASISDELEM_R 0x00,0xC0,0x00,0x5F = fmul h0, h0, v0.h[0] # ENC_SQRDMULH_ASISDELEM_R 0x00,0xD0,0x00,0x5F = fmul h0, h0, v0.h[0] # ENC_SSHR_ASISDSHF_R 0x00,0x04,0x08,0x5F = fmul h0, h0, v0.h[0] # ENC_SSRA_ASISDSHF_R 0x00,0x14,0x08,0x5F = fmul h0, h0, v0.h[0] # ENC_SRSHR_ASISDSHF_R 0x00,0x24,0x08,0x5F = fmul h0, h0, v0.h[0] # ENC_SRSRA_ASISDSHF_R 0x00,0x34,0x08,0x5F = fmul h0, h0, v0.h[0] # ENC_SHL_ASISDSHF_R 0x00,0x54,0x08,0x5F = fmul h0, h0, v0.h[0] # ENC_SQSHL_ASISDSHF_R 0x00,0x74,0x08,0x5F = sqshl b0, b0, #0 # ENC_SQSHRN_ASISDSHF_N 0x00,0x94,0x08,0x5F = sqshrn b0, h0, #8 # ENC_SQRSHRN_ASISDSHF_N 0x00,0x9C,0x08,0x5F = sqrshrn b0, h0, #8 # ENC_SCVTF_ASISDSHF_C 0x00,0xE4,0x08,0x5F = sqrshrn b0, h0, #8 # ENC_FCVTZS_ASISDSHF_C 0x00,0xFC,0x08,0x5F = sqrshrn b0, h0, #8 # ENC_FMLA_ASISDELEM_R_SD 0x00,0x10,0x80,0x5F = fmla s0, s0, v0.s[0] # ENC_FMLS_ASISDELEM_R_SD 0x00,0x50,0x80,0x5F = fmls s0, s0, v0.s[0] # ENC_FMUL_ASISDELEM_R_SD 0x00,0x90,0x80,0x5F = fmul s0, s0, v0.s[0] # ENC_FCMLA_Z_P_ZZZ_ 0x00,0x00,0x00,0x64 = fmul s0, s0, v0.s[0] # ENC_FCADD_Z_P_ZZ_ 0x00,0x80,0x00,0x64 = fmul s0, s0, v0.s[0] # ENC_FMLA_Z_ZZZI_H 0x00,0x00,0x20,0x64 = fmul s0, s0, v0.s[0] # ENC_FMLS_Z_ZZZI_H 0x00,0x04,0x20,0x64 = fmul s0, s0, v0.s[0] # ENC_FMUL_Z_ZZI_H 0x00,0x20,0x20,0x64 = fmul s0, s0, v0.s[0] # ENC_BFDOT_Z_ZZZI_ 0x00,0x40,0x60,0x64 = fmul s0, s0, v0.s[0] # ENC_BFDOT_Z_ZZZ_ 0x00,0x80,0x60,0x64 = fmul s0, s0, v0.s[0] # ENC_BFMMLA_Z_ZZZ_ 0x00,0xE4,0x60,0x64 = fmul s0, s0, v0.s[0] # ENC_BFCVTNT_Z_P_Z_S2BF 0x00,0xA0,0x8A,0x64 = fmul s0, s0, v0.s[0] # ENC_FMLA_Z_ZZZI_S 0x00,0x00,0xA0,0x64 = fmul s0, s0, v0.s[0] # ENC_FMLS_Z_ZZZI_S 0x00,0x04,0xA0,0x64 = fmul s0, s0, v0.s[0] # ENC_FCMLA_Z_ZZZI_H 0x00,0x10,0xA0,0x64 = fmul s0, s0, v0.s[0] # ENC_FMUL_Z_ZZI_S 0x00,0x20,0xA0,0x64 = fmul s0, s0, v0.s[0] # ENC_FMMLA_Z_ZZZ_S 0x00,0xE4,0xA0,0x64 = fmul s0, s0, v0.s[0] # ENC_FMLA_Z_ZZZI_D 0x00,0x00,0xE0,0x64 = fmul s0, s0, v0.s[0] # ENC_FMLS_Z_ZZZI_D 0x00,0x04,0xE0,0x64 = fmul s0, s0, v0.s[0] # ENC_FCMLA_Z_ZZZI_S 0x00,0x10,0xE0,0x64 = fmul s0, s0, v0.s[0] # ENC_FMUL_Z_ZZI_D 0x00,0x20,0xE0,0x64 = fmul s0, s0, v0.s[0] # ENC_BFMLALB_Z_ZZZI_ 0x00,0x40,0xE0,0x64 = fmul s0, s0, v0.s[0] # ENC_BFMLALT_Z_ZZZI_ 0x00,0x44,0xE0,0x64 = fmul s0, s0, v0.s[0] # ENC_BFMLALB_Z_ZZZ_ 0x00,0x80,0xE0,0x64 = fmul s0, s0, v0.s[0] # ENC_BFMLALT_Z_ZZZ_ 0x00,0x84,0xE0,0x64 = fmul s0, s0, v0.s[0] # ENC_FMMLA_Z_ZZZ_D 0x00,0xE4,0xE0,0x64 = fmul s0, s0, v0.s[0] # ENC_FADD_Z_ZZ_ 0x00,0x00,0x00,0x65 = fmul s0, s0, v0.s[0] # ENC_FSUB_Z_ZZ_ 0x00,0x04,0x00,0x65 = fmul s0, s0, v0.s[0] # ENC_FMUL_Z_ZZ_ 0x00,0x08,0x00,0x65 = fmul s0, s0, v0.s[0] # ENC_FTSMUL_Z_ZZ_ 0x00,0x0C,0x00,0x65 = fmul s0, s0, v0.s[0] # ENC_FRECPS_Z_ZZ_ 0x00,0x18,0x00,0x65 = fmul s0, s0, v0.s[0] # ENC_FRSQRTS_Z_ZZ_ 0x00,0x1C,0x00,0x65 = fmul s0, s0, v0.s[0] # ENC_FADDV_V_P_Z_ 0x00,0x20,0x00,0x65 = fmul s0, s0, v0.s[0] # ENC_FCMGE_P_P_ZZ_ 0x00,0x40,0x00,0x65 = fmul s0, s0, v0.s[0] # ENC_FCMGT_P_P_ZZ_ 0x10,0x40,0x00,0x65 = fmul s0, s0, v0.s[0] # ENC_FCMEQ_P_P_ZZ_ 0x00,0x60,0x00,0x65 = fmul s0, s0, v0.s[0] # ENC_FCMNE_P_P_ZZ_ 0x10,0x60,0x00,0x65 = fmul s0, s0, v0.s[0] # ENC_FADD_Z_P_ZZ_ 0x00,0x80,0x00,0x65 = fmul s0, s0, v0.s[0] # ENC_FRINTN_Z_P_Z_ 0x00,0xA0,0x00,0x65 = fmul s0, s0, v0.s[0] # ENC_FCMUO_P_P_ZZ_ 0x00,0xC0,0x00,0x65 = fmul s0, s0, v0.s[0] # ENC_FACGE_P_P_ZZ_ 0x10,0xC0,0x00,0x65 = fmul s0, s0, v0.s[0] # ENC_FACGT_P_P_ZZ_ 0x10,0xE0,0x00,0x65 = fmul s0, s0, v0.s[0] # ENC_FSUB_Z_P_ZZ_ 0x00,0x80,0x01,0x65 = fmul s0, s0, v0.s[0] # ENC_FRINTP_Z_P_Z_ 0x00,0xA0,0x01,0x65 = fmul s0, s0, v0.s[0] # ENC_FMUL_Z_P_ZZ_ 0x00,0x80,0x02,0x65 = fmul s0, s0, v0.s[0] # ENC_FRINTM_Z_P_Z_ 0x00,0xA0,0x02,0x65 = fmul s0, s0, v0.s[0] # ENC_FSUBR_Z_P_ZZ_ 0x00,0x80,0x03,0x65 = fmul s0, s0, v0.s[0] # ENC_FRINTZ_Z_P_Z_ 0x00,0xA0,0x03,0x65 = fmul s0, s0, v0.s[0] # ENC_FMAXNMV_V_P_Z_ 0x00,0x20,0x04,0x65 = fmul s0, s0, v0.s[0] # ENC_FMAXNM_Z_P_ZZ_ 0x00,0x80,0x04,0x65 = fmul s0, s0, v0.s[0] # ENC_FRINTA_Z_P_Z_ 0x00,0xA0,0x04,0x65 = fmul s0, s0, v0.s[0] # ENC_FMINNMV_V_P_Z_ 0x00,0x20,0x05,0x65 = fmul s0, s0, v0.s[0] # ENC_FMINNM_Z_P_ZZ_ 0x00,0x80,0x05,0x65 = fmul s0, s0, v0.s[0] # ENC_FMAXV_V_P_Z_ 0x00,0x20,0x06,0x65 = fmul s0, s0, v0.s[0] # ENC_FMAX_Z_P_ZZ_ 0x00,0x80,0x06,0x65 = fmul s0, s0, v0.s[0] # ENC_FRINTX_Z_P_Z_ 0x00,0xA0,0x06,0x65 = fmul s0, s0, v0.s[0] # ENC_FMINV_V_P_Z_ 0x00,0x20,0x07,0x65 = fmul s0, s0, v0.s[0] # ENC_FMIN_Z_P_ZZ_ 0x00,0x80,0x07,0x65 = fmul s0, s0, v0.s[0] # ENC_FRINTI_Z_P_Z_ 0x00,0xA0,0x07,0x65 = fmul s0, s0, v0.s[0] # ENC_FABD_Z_P_ZZ_ 0x00,0x80,0x08,0x65 = fmul s0, s0, v0.s[0] # ENC_FSCALE_Z_P_ZZ_ 0x00,0x80,0x09,0x65 = fmul s0, s0, v0.s[0] # ENC_FMULX_Z_P_ZZ_ 0x00,0x80,0x0A,0x65 = fmul s0, s0, v0.s[0] # ENC_FDIVR_Z_P_ZZ_ 0x00,0x80,0x0C,0x65 = fmul s0, s0, v0.s[0] # ENC_FRECPX_Z_P_Z_ 0x00,0xA0,0x0C,0x65 = fmul s0, s0, v0.s[0] # ENC_FDIV_Z_P_ZZ_ 0x00,0x80,0x0D,0x65 = fmul s0, s0, v0.s[0] # ENC_FSQRT_Z_P_Z_ 0x00,0xA0,0x0D,0x65 = fmul s0, s0, v0.s[0] # ENC_FRECPE_Z_Z_ 0x00,0x30,0x0E,0x65 = fmul s0, s0, v0.s[0] # ENC_FRSQRTE_Z_Z_ 0x00,0x30,0x0F,0x65 = fmul s0, s0, v0.s[0] # ENC_FCMGE_P_P_Z0_ 0x00,0x20,0x10,0x65 = fmul s0, s0, v0.s[0] # ENC_FCMGT_P_P_Z0_ 0x10,0x20,0x10,0x65 = fmul s0, s0, v0.s[0] # ENC_FTMAD_Z_ZZI_ 0x00,0x80,0x10,0x65 = fmul s0, s0, v0.s[0] # ENC_FCMLT_P_P_Z0_ 0x00,0x20,0x11,0x65 = fmul s0, s0, v0.s[0] # ENC_FCMLE_P_P_Z0_ 0x10,0x20,0x11,0x65 = fmul s0, s0, v0.s[0] # ENC_FCMEQ_P_P_Z0_ 0x00,0x20,0x12,0x65 = fmul s0, s0, v0.s[0] # ENC_FCMNE_P_P_Z0_ 0x00,0x20,0x13,0x65 = fmul s0, s0, v0.s[0] # ENC_FADDA_V_P_Z_ 0x00,0x20,0x18,0x65 = fmul s0, s0, v0.s[0] # ENC_FADD_Z_P_ZS_ 0x00,0x80,0x18,0x65 = fmul s0, s0, v0.s[0] # ENC_FSUB_Z_P_ZS_ 0x00,0x80,0x19,0x65 = fmul s0, s0, v0.s[0] # ENC_FMUL_Z_P_ZS_ 0x00,0x80,0x1A,0x65 = fmul s0, s0, v0.s[0] # ENC_FSUBR_Z_P_ZS_ 0x00,0x80,0x1B,0x65 = fmul s0, s0, v0.s[0] # ENC_FMAXNM_Z_P_ZS_ 0x00,0x80,0x1C,0x65 = fmul s0, s0, v0.s[0] # ENC_FMINNM_Z_P_ZS_ 0x00,0x80,0x1D,0x65 = fmul s0, s0, v0.s[0] # ENC_FMAX_Z_P_ZS_ 0x00,0x80,0x1E,0x65 = fmul s0, s0, v0.s[0] # ENC_FMIN_Z_P_ZS_ 0x00,0x80,0x1F,0x65 = fmul s0, s0, v0.s[0] # ENC_FMLA_Z_P_ZZZ_ 0x00,0x00,0x20,0x65 = fmul s0, s0, v0.s[0] # ENC_FMLS_Z_P_ZZZ_ 0x00,0x20,0x20,0x65 = fmul s0, s0, v0.s[0] # ENC_FNMLA_Z_P_ZZZ_ 0x00,0x40,0x20,0x65 = fmul s0, s0, v0.s[0] # ENC_FNMLS_Z_P_ZZZ_ 0x00,0x60,0x20,0x65 = fmul s0, s0, v0.s[0] # ENC_FMAD_Z_P_ZZZ_ 0x00,0x80,0x20,0x65 = fmul s0, s0, v0.s[0] # ENC_FMSB_Z_P_ZZZ_ 0x00,0xA0,0x20,0x65 = fmul s0, s0, v0.s[0] # ENC_FNMAD_Z_P_ZZZ_ 0x00,0xC0,0x20,0x65 = fmul s0, s0, v0.s[0] # ENC_FNMSB_Z_P_ZZZ_ 0x00,0xE0,0x20,0x65 = fmul s0, s0, v0.s[0] # ENC_SCVTF_Z_P_Z_H2FP16 0x00,0xA0,0x52,0x65 = fmul s0, s0, v0.s[0] # ENC_UCVTF_Z_P_Z_H2FP16 0x00,0xA0,0x53,0x65 = fmul s0, s0, v0.s[0] # ENC_SCVTF_Z_P_Z_W2FP16 0x00,0xA0,0x54,0x65 = fmul s0, s0, v0.s[0] # ENC_UCVTF_Z_P_Z_W2FP16 0x00,0xA0,0x55,0x65 = fmul s0, s0, v0.s[0] # ENC_SCVTF_Z_P_Z_X2FP16 0x00,0xA0,0x56,0x65 = fmul s0, s0, v0.s[0] # ENC_UCVTF_Z_P_Z_X2FP16 0x00,0xA0,0x57,0x65 = fmul s0, s0, v0.s[0] # ENC_FCVTZS_Z_P_Z_FP162H 0x00,0xA0,0x5A,0x65 = fmul s0, s0, v0.s[0] # ENC_FCVTZU_Z_P_Z_FP162H 0x00,0xA0,0x5B,0x65 = fmul s0, s0, v0.s[0] # ENC_FCVTZS_Z_P_Z_FP162W 0x00,0xA0,0x5C,0x65 = fmul s0, s0, v0.s[0] # ENC_FCVTZU_Z_P_Z_FP162W 0x00,0xA0,0x5D,0x65 = fmul s0, s0, v0.s[0] # ENC_FCVTZS_Z_P_Z_FP162X 0x00,0xA0,0x5E,0x65 = fmul s0, s0, v0.s[0] # ENC_FCVTZU_Z_P_Z_FP162X 0x00,0xA0,0x5F,0x65 = fmul s0, s0, v0.s[0] # ENC_FCVT_Z_P_Z_S2H 0x00,0xA0,0x88,0x65 = fmul s0, s0, v0.s[0] # ENC_FCVT_Z_P_Z_H2S 0x00,0xA0,0x89,0x65 = fmul s0, s0, v0.s[0] # ENC_BFCVT_Z_P_Z_S2BF 0x00,0xA0,0x8A,0x65 = fmul s0, s0, v0.s[0] # ENC_SCVTF_Z_P_Z_W2S 0x00,0xA0,0x94,0x65 = fmul s0, s0, v0.s[0] # ENC_UCVTF_Z_P_Z_W2S 0x00,0xA0,0x95,0x65 = fmul s0, s0, v0.s[0] # ENC_FCVTZS_Z_P_Z_S2W 0x00,0xA0,0x9C,0x65 = fmul s0, s0, v0.s[0] # ENC_FCVTZU_Z_P_Z_S2W 0x00,0xA0,0x9D,0x65 = fmul s0, s0, v0.s[0] # ENC_FCVT_Z_P_Z_D2H 0x00,0xA0,0xC8,0x65 = fmul s0, s0, v0.s[0] # ENC_FCVT_Z_P_Z_H2D 0x00,0xA0,0xC9,0x65 = fmul s0, s0, v0.s[0] # ENC_FCVT_Z_P_Z_D2S 0x00,0xA0,0xCA,0x65 = fmul s0, s0, v0.s[0] # ENC_FCVT_Z_P_Z_S2D 0x00,0xA0,0xCB,0x65 = fmul s0, s0, v0.s[0] # ENC_SCVTF_Z_P_Z_W2D 0x00,0xA0,0xD0,0x65 = fmul s0, s0, v0.s[0] # ENC_UCVTF_Z_P_Z_W2D 0x00,0xA0,0xD1,0x65 = fmul s0, s0, v0.s[0] # ENC_SCVTF_Z_P_Z_X2S 0x00,0xA0,0xD4,0x65 = fmul s0, s0, v0.s[0] # ENC_UCVTF_Z_P_Z_X2S 0x00,0xA0,0xD5,0x65 = fmul s0, s0, v0.s[0] # ENC_SCVTF_Z_P_Z_X2D 0x00,0xA0,0xD6,0x65 = fmul s0, s0, v0.s[0] # ENC_UCVTF_Z_P_Z_X2D 0x00,0xA0,0xD7,0x65 = fmul s0, s0, v0.s[0] # ENC_FCVTZS_Z_P_Z_D2W 0x00,0xA0,0xD8,0x65 = fmul s0, s0, v0.s[0] # ENC_FCVTZU_Z_P_Z_D2W 0x00,0xA0,0xD9,0x65 = fmul s0, s0, v0.s[0] # ENC_FCVTZS_Z_P_Z_S2X 0x00,0xA0,0xDC,0x65 = fmul s0, s0, v0.s[0] # ENC_FCVTZU_Z_P_Z_S2X 0x00,0xA0,0xDD,0x65 = fmul s0, s0, v0.s[0] # ENC_FCVTZS_Z_P_Z_D2X 0x00,0xA0,0xDE,0x65 = fmul s0, s0, v0.s[0] # ENC_FCVTZU_Z_P_Z_D2X 0x00,0xA0,0xDF,0x65 = fmul s0, s0, v0.s[0] # ENC_STGP_64_LDSTPAIR_POST 0x00,0x00,0x80,0x68 = fmul s0, s0, v0.s[0] # ENC_LDPSW_64_LDSTPAIR_POST 0x00,0x00,0xC0,0x68 = fmul s0, s0, v0.s[0] # ENC_STGP_64_LDSTPAIR_OFF 0x00,0x00,0x00,0x69 = stgp x0, x0, [x0] # ENC_LDPSW_64_LDSTPAIR_OFF 0x00,0x00,0x40,0x69 = stgp x0, x0, [x0] # ENC_STGP_64_LDSTPAIR_PRE 0x00,0x00,0x80,0x69 = stgp x0, x0, [x0] # ENC_LDPSW_64_LDSTPAIR_PRE 0x00,0x00,0xC0,0x69 = stgp x0, x0, [x0] # ENC_ANDS_32_LOG_SHIFT 0x00,0x00,0x00,0x6A = ands w0, w0, w0 # ENC_TST_ANDS_32_LOG_SHIFT 0x1F,0x00,0x00,0x6A = tst w0, w0 # ENC_BICS_32_LOG_SHIFT 0x00,0x00,0x20,0x6A = bics w0, w0, w0 # ENC_SUBS_32_ADDSUB_SHIFT 0x00,0x00,0x00,0x6B = subs w0, w0, w0 # ENC_CMP_SUBS_32_ADDSUB_SHIFT 0x1F,0x00,0x00,0x6B = cmp w0, w0 # ENC_NEGS_SUBS_32_ADDSUB_SHIFT 0xE0,0x03,0x00,0x6B = negs w0, w0 # ENC_SUBS_32S_ADDSUB_EXT 0x00,0x00,0x20,0x6B = subs w0, w0, w0, uxtb # ENC_CMP_SUBS_32S_ADDSUB_EXT 0x1F,0x00,0x20,0x6B = cmp w0, w0, uxtb # ENC_STNP_D_LDSTNAPAIR_OFFS 0x00,0x00,0x00,0x6C = stnp d0, d0, [x0] # ENC_LDNP_D_LDSTNAPAIR_OFFS 0x00,0x00,0x40,0x6C = stnp d0, d0, [x0] # ENC_STP_D_LDSTPAIR_POST 0x00,0x00,0x80,0x6C = stp d0, d0, [x0], #0 # ENC_LDP_D_LDSTPAIR_POST 0x00,0x00,0xC0,0x6C = stp d0, d0, [x0], #0 # ENC_STP_D_LDSTPAIR_OFF 0x00,0x00,0x00,0x6D = stp d0, d0, [x0] # ENC_LDP_D_LDSTPAIR_OFF 0x00,0x00,0x40,0x6D = stp d0, d0, [x0] # ENC_STP_D_LDSTPAIR_PRE 0x00,0x00,0x80,0x6D = stp d0, d0, [x0, #0]! # ENC_LDP_D_LDSTPAIR_PRE 0x00,0x00,0xC0,0x6D = stp d0, d0, [x0, #0]! # ENC_MOV_INS_ASIMDINS_IV_V 0x00,0x04,0x01,0x6E = mov v0.b[0], v0.b[0] # ENC_BFMMLA_ASIMDSAME2_E 0x00,0xEC,0x40,0x6E = mov v0.b[0], v0.b[0] # ENC_UMMLA_ASIMDSAME2_G 0x00,0xA4,0x80,0x6E = mov v0.b[0], v0.b[0] # ENC_MOVI_ASIMDIMM_D2_D 0x00,0xE4,0x00,0x6F = movi v0.2d, #0000000000000000 # ENC_FMOV_ASIMDIMM_D2_D 0x00,0xF4,0x00,0x6F = fmov v0.2d, #2.00000000 # ENC_SUBS_32S_ADDSUB_IMM 0x00,0x00,0x00,0x71 = subs w0, w0, #0 # ENC_CMP_SUBS_32S_ADDSUB_IMM 0x1F,0x00,0x00,0x71 = cmp w0, #0 # ENC_ANDS_32S_LOG_IMM 0x00,0x00,0x00,0x72 = ands w0, w0, #0x1 # ENC_TST_ANDS_32S_LOG_IMM 0x1F,0x00,0x00,0x72 = tst w0, #0x1 # ENC_MOVK_32_MOVEWIDE 0x00,0x00,0x80,0x72 = movk w0, #0 # ENC_STURH_32_LDST_UNSCALED 0x00,0x00,0x00,0x78 = sturh w0, [x0] # ENC_STRH_32_LDST_IMMPOST 0x00,0x04,0x00,0x78 = strh w0, [x0], #0 # ENC_STTRH_32_LDST_UNPRIV 0x00,0x08,0x00,0x78 = sttrh w0, [x0] # ENC_STRH_32_LDST_IMMPRE 0x00,0x0C,0x00,0x78 = strh w0, [x0, #0]! # ENC_LDADDH_32_MEMOP 0x00,0x00,0x20,0x78 = ldaddh w0, w0, [x0] # ENC_STADDH_LDADDH_32_MEMOP 0x1F,0x00,0x20,0x78 = staddh w0, [x0] # ENC_STRH_32_LDST_REGOFF 0x00,0x08,0x20,0x78 = staddh w0, [x0] # ENC_LDCLRH_32_MEMOP 0x00,0x10,0x20,0x78 = ldclrh w0, w0, [x0] # ENC_STCLRH_LDCLRH_32_MEMOP 0x1F,0x10,0x20,0x78 = stclrh w0, [x0] # ENC_LDEORH_32_MEMOP 0x00,0x20,0x20,0x78 = ldeorh w0, w0, [x0] # ENC_STEORH_LDEORH_32_MEMOP 0x1F,0x20,0x20,0x78 = steorh w0, [x0] # ENC_LDSETH_32_MEMOP 0x00,0x30,0x20,0x78 = ldseth w0, w0, [x0] # ENC_STSETH_LDSETH_32_MEMOP 0x1F,0x30,0x20,0x78 = stseth w0, [x0] # ENC_LDSMAXH_32_MEMOP 0x00,0x40,0x20,0x78 = ldsmaxh w0, w0, [x0] # ENC_STSMAXH_LDSMAXH_32_MEMOP 0x1F,0x40,0x20,0x78 = stsmaxh w0, [x0] # ENC_LDSMINH_32_MEMOP 0x00,0x50,0x20,0x78 = ldsminh w0, w0, [x0] # ENC_STSMINH_LDSMINH_32_MEMOP 0x1F,0x50,0x20,0x78 = stsminh w0, [x0] # ENC_LDUMAXH_32_MEMOP 0x00,0x60,0x20,0x78 = ldumaxh w0, w0, [x0] # ENC_STUMAXH_LDUMAXH_32_MEMOP 0x1F,0x60,0x20,0x78 = stumaxh w0, [x0] # ENC_LDUMINH_32_MEMOP 0x00,0x70,0x20,0x78 = lduminh w0, w0, [x0] # ENC_STUMINH_LDUMINH_32_MEMOP 0x1F,0x70,0x20,0x78 = stuminh w0, [x0] # ENC_SWPH_32_MEMOP 0x00,0x80,0x20,0x78 = swph w0, w0, [x0] # ENC_LDURH_32_LDST_UNSCALED 0x00,0x00,0x40,0x78 = ldurh w0, [x0] # ENC_LDRH_32_LDST_IMMPOST 0x00,0x04,0x40,0x78 = ldurh w0, [x0] # ENC_LDTRH_32_LDST_UNPRIV 0x00,0x08,0x40,0x78 = ldurh w0, [x0] # ENC_LDRH_32_LDST_IMMPRE 0x00,0x0C,0x40,0x78 = ldurh w0, [x0] # ENC_LDADDLH_32_MEMOP 0x00,0x00,0x60,0x78 = ldaddlh w0, w0, [x0] # ENC_STADDLH_LDADDLH_32_MEMOP 0x1F,0x00,0x60,0x78 = staddlh w0, [x0] # ENC_LDRH_32_LDST_REGOFF 0x00,0x08,0x60,0x78 = staddlh w0, [x0] # ENC_LDCLRLH_32_MEMOP 0x00,0x10,0x60,0x78 = ldclrlh w0, w0, [x0] # ENC_STCLRLH_LDCLRLH_32_MEMOP 0x1F,0x10,0x60,0x78 = stclrlh w0, [x0] # ENC_LDEORLH_32_MEMOP 0x00,0x20,0x60,0x78 = ldeorlh w0, w0, [x0] # ENC_STEORLH_LDEORLH_32_MEMOP 0x1F,0x20,0x60,0x78 = steorlh w0, [x0] # ENC_LDSETLH_32_MEMOP 0x00,0x30,0x60,0x78 = ldsetlh w0, w0, [x0] # ENC_STSETLH_LDSETLH_32_MEMOP 0x1F,0x30,0x60,0x78 = stsetlh w0, [x0] # ENC_LDSMAXLH_32_MEMOP 0x00,0x40,0x60,0x78 = ldsmaxlh w0, w0, [x0] # ENC_STSMAXLH_LDSMAXLH_32_MEMOP 0x1F,0x40,0x60,0x78 = stsmaxlh w0, [x0] # ENC_LDSMINLH_32_MEMOP 0x00,0x50,0x60,0x78 = ldsminlh w0, w0, [x0] # ENC_STSMINLH_LDSMINLH_32_MEMOP 0x1F,0x50,0x60,0x78 = stsminlh w0, [x0] # ENC_LDUMAXLH_32_MEMOP 0x00,0x60,0x60,0x78 = ldumaxlh w0, w0, [x0] # ENC_STUMAXLH_LDUMAXLH_32_MEMOP 0x1F,0x60,0x60,0x78 = stumaxlh w0, [x0] # ENC_LDUMINLH_32_MEMOP 0x00,0x70,0x60,0x78 = lduminlh w0, w0, [x0] # ENC_STUMINLH_LDUMINLH_32_MEMOP 0x1F,0x70,0x60,0x78 = stuminlh w0, [x0] # ENC_SWPLH_32_MEMOP 0x00,0x80,0x60,0x78 = swplh w0, w0, [x0] # ENC_LDURSH_64_LDST_UNSCALED 0x00,0x00,0x80,0x78 = ldursh x0, [x0] # ENC_LDRSH_64_LDST_IMMPOST 0x00,0x04,0x80,0x78 = ldrsh x0, [x0], #0 # ENC_LDTRSH_64_LDST_UNPRIV 0x00,0x08,0x80,0x78 = ldtrsh x0, [x0] # ENC_LDRSH_64_LDST_IMMPRE 0x00,0x0C,0x80,0x78 = ldrsh x0, [x0, #0]! # ENC_LDADDAH_32_MEMOP 0x00,0x00,0xA0,0x78 = ldaddah w0, w0, [x0] # ENC_LDRSH_64_LDST_REGOFF 0x00,0x08,0xA0,0x78 = ldaddah w0, w0, [x0] # ENC_LDCLRAH_32_MEMOP 0x00,0x10,0xA0,0x78 = ldclrah w0, w0, [x0] # ENC_LDEORAH_32_MEMOP 0x00,0x20,0xA0,0x78 = ldeorah w0, w0, [x0] # ENC_LDSETAH_32_MEMOP 0x00,0x30,0xA0,0x78 = ldsetah w0, w0, [x0] # ENC_LDSMAXAH_32_MEMOP 0x00,0x40,0xA0,0x78 = ldsmaxah w0, w0, [x0] # ENC_LDSMINAH_32_MEMOP 0x00,0x50,0xA0,0x78 = ldsminah w0, w0, [x0] # ENC_LDUMAXAH_32_MEMOP 0x00,0x60,0xA0,0x78 = ldumaxah w0, w0, [x0] # ENC_LDUMINAH_32_MEMOP 0x00,0x70,0xA0,0x78 = lduminah w0, w0, [x0] # ENC_SWPAH_32_MEMOP 0x00,0x80,0xA0,0x78 = swpah w0, w0, [x0] # ENC_LDAPRH_32L_MEMOP 0x00,0xC0,0xBF,0x78 = ldaprh w0, [x0] # ENC_LDURSH_32_LDST_UNSCALED 0x00,0x00,0xC0,0x78 = ldursh w0, [x0] # ENC_LDRSH_32_LDST_IMMPOST 0x00,0x04,0xC0,0x78 = ldursh w0, [x0] # ENC_LDTRSH_32_LDST_UNPRIV 0x00,0x08,0xC0,0x78 = ldursh w0, [x0] # ENC_LDRSH_32_LDST_IMMPRE 0x00,0x0C,0xC0,0x78 = ldursh w0, [x0] # ENC_LDADDALH_32_MEMOP 0x00,0x00,0xE0,0x78 = ldaddalh w0, w0, [x0] # ENC_LDRSH_32_LDST_REGOFF 0x00,0x08,0xE0,0x78 = ldaddalh w0, w0, [x0] # ENC_LDCLRALH_32_MEMOP 0x00,0x10,0xE0,0x78 = ldclralh w0, w0, [x0] # ENC_LDEORALH_32_MEMOP 0x00,0x20,0xE0,0x78 = ldeoralh w0, w0, [x0] # ENC_LDSETALH_32_MEMOP 0x00,0x30,0xE0,0x78 = ldsetalh w0, w0, [x0] # ENC_LDSMAXALH_32_MEMOP 0x00,0x40,0xE0,0x78 = ldsmaxalh w0, w0, [x0] # ENC_LDSMINALH_32_MEMOP 0x00,0x50,0xE0,0x78 = ldsminalh w0, w0, [x0] # ENC_LDUMAXALH_32_MEMOP 0x00,0x60,0xE0,0x78 = ldumaxalh w0, w0, [x0] # ENC_LDUMINALH_32_MEMOP 0x00,0x70,0xE0,0x78 = lduminalh w0, w0, [x0] # ENC_SWPALH_32_MEMOP 0x00,0x80,0xE0,0x78 = swpalh w0, w0, [x0] # ENC_STRH_32_LDST_POS 0x00,0x00,0x00,0x79 = strh w0, [x0] # ENC_LDRH_32_LDST_POS 0x00,0x00,0x40,0x79 = ldrh w0, [x0] # ENC_LDRSH_64_LDST_POS 0x00,0x00,0x80,0x79 = ldrsh x0, [x0] # ENC_LDRSH_32_LDST_POS 0x00,0x00,0xC0,0x79 = ldrsh w0, [x0] # ENC_SBCS_32_ADDSUB_CARRY 0x00,0x00,0x00,0x7A = sbcs w0, w0, w0 # ENC_NGCS_SBCS_32_ADDSUB_CARRY 0xE0,0x03,0x00,0x7A = ngcs w0, w0 # ENC_CCMP_32_CONDCMP_REG 0x00,0x00,0x40,0x7A = ccmp w0, w0, #0, eq # ENC_CCMP_32_CONDCMP_IMM 0x00,0x08,0x40,0x7A = ccmp w0, #0, #0, eq # ENC_STUR_H_LDST_UNSCALED 0x00,0x00,0x00,0x7C = stur h0, [x0] # ENC_STR_H_LDST_IMMPOST 0x00,0x04,0x00,0x7C = str h0, [x0], #0 # ENC_STR_H_LDST_IMMPRE 0x00,0x0C,0x00,0x7C = str h0, [x0, #0]! # ENC_STR_H_LDST_REGOFF 0x00,0x08,0x20,0x7C = str h0, [x0, #0]! # ENC_LDUR_H_LDST_UNSCALED 0x00,0x00,0x40,0x7C = ldur h0, [x0] # ENC_LDR_H_LDST_IMMPOST 0x00,0x04,0x40,0x7C = ldr h0, [x0], #0 # ENC_LDR_H_LDST_IMMPRE 0x00,0x0C,0x40,0x7C = ldr h0, [x0, #0]! # ENC_LDR_H_LDST_REGOFF 0x00,0x08,0x60,0x7C = ldr h0, [x0, #0]! # ENC_STR_H_LDST_POS 0x00,0x00,0x00,0x7D = str h0, [x0] # ENC_LDR_H_LDST_POS 0x00,0x00,0x40,0x7D = ldr h0, [x0] # ENC_SQRDMLAH_ASISDSAME2_ONLY 0x00,0x84,0x00,0x7E = ldr h0, [x0] # ENC_SQRDMLSH_ASISDSAME2_ONLY 0x00,0x8C,0x00,0x7E = ldr h0, [x0] # ENC_UQADD_ASISDSAME_ONLY 0x00,0x0C,0x20,0x7E = uqadd b0, b0, b0 # ENC_UQSUB_ASISDSAME_ONLY 0x00,0x2C,0x20,0x7E = uqsub b0, b0, b0 # ENC_CMHI_ASISDSAME_ONLY 0x00,0x34,0x20,0x7E = uqsub b0, b0, b0 # ENC_USQADD_ASISDMISC_R 0x00,0x38,0x20,0x7E = usqadd b0, b0 # ENC_CMHS_ASISDSAME_ONLY 0x00,0x3C,0x20,0x7E = usqadd b0, b0 # ENC_USHL_ASISDSAME_ONLY 0x00,0x44,0x20,0x7E = usqadd b0, b0 # ENC_UQSHL_ASISDSAME_ONLY 0x00,0x4C,0x20,0x7E = uqshl b0, b0, b0 # ENC_URSHL_ASISDSAME_ONLY 0x00,0x54,0x20,0x7E = uqshl b0, b0, b0 # ENC_UQRSHL_ASISDSAME_ONLY 0x00,0x5C,0x20,0x7E = uqrshl b0, b0, b0 # ENC_SQNEG_ASISDMISC_R 0x00,0x78,0x20,0x7E = sqneg b0, b0 # ENC_SUB_ASISDSAME_ONLY 0x00,0x84,0x20,0x7E = sqneg b0, b0 # ENC_CMGE_ASISDMISC_Z 0x00,0x88,0x20,0x7E = sqneg b0, b0 # ENC_CMEQ_ASISDSAME_ONLY 0x00,0x8C,0x20,0x7E = sqneg b0, b0 # ENC_CMLE_ASISDMISC_Z 0x00,0x98,0x20,0x7E = sqneg b0, b0 # ENC_SQRDMULH_ASISDSAME_ONLY 0x00,0xB4,0x20,0x7E = sqneg b0, b0 # ENC_NEG_ASISDMISC_R 0x00,0xB8,0x20,0x7E = sqneg b0, b0 # ENC_FCMGE_ASISDSAME_ONLY 0x00,0xE4,0x20,0x7E = fcmge s0, s0, s0 # ENC_FACGE_ASISDSAME_ONLY 0x00,0xEC,0x20,0x7E = facge s0, s0, s0 # ENC_SQXTUN_ASISDMISC_N 0x00,0x28,0x21,0x7E = sqxtun b0, h0 # ENC_UQXTN_ASISDMISC_N 0x00,0x48,0x21,0x7E = uqxtn b0, h0 # ENC_FCVTXN_ASISDMISC_N 0x00,0x68,0x21,0x7E = uqxtn b0, h0 # ENC_FCVTNU_ASISDMISC_R 0x00,0xA8,0x21,0x7E = fcvtnu s0, s0 # ENC_FCVTMU_ASISDMISC_R 0x00,0xB8,0x21,0x7E = fcvtmu s0, s0 # ENC_FCVTAU_ASISDMISC_R 0x00,0xC8,0x21,0x7E = fcvtau s0, s0 # ENC_UCVTF_ASISDMISC_R 0x00,0xD8,0x21,0x7E = ucvtf s0, s0 # ENC_FMAXNMP_ASISDPAIR_ONLY_SD 0x00,0xC8,0x30,0x7E = fmaxnmp s0, v0.2s # ENC_FADDP_ASISDPAIR_ONLY_SD 0x00,0xD8,0x30,0x7E = faddp s0, v0.2s # ENC_FMAXP_ASISDPAIR_ONLY_SD 0x00,0xF8,0x30,0x7E = fmaxp s0, v0.2s # ENC_FCMGE_ASISDSAMEFP16_ONLY 0x00,0x24,0x40,0x7E = fcmge h0, h0, h0 # ENC_FACGE_ASISDSAMEFP16_ONLY 0x00,0x2C,0x40,0x7E = facge h0, h0, h0 # ENC_FCVTNU_ASISDMISCFP16_R 0x00,0xA8,0x79,0x7E = fcvtnu h0, h0 # ENC_FCVTMU_ASISDMISCFP16_R 0x00,0xB8,0x79,0x7E = fcvtmu h0, h0 # ENC_FCVTAU_ASISDMISCFP16_R 0x00,0xC8,0x79,0x7E = fcvtau h0, h0 # ENC_UCVTF_ASISDMISCFP16_R 0x00,0xD8,0x79,0x7E = ucvtf h0, h0 # ENC_FCMGE_ASISDMISC_FZ 0x00,0xC8,0xA0,0x7E = fcmge s0, s0, #0.0 # ENC_FABD_ASISDSAME_ONLY 0x00,0xD4,0xA0,0x7E = fabd s0, s0, s0 # ENC_FCMLE_ASISDMISC_FZ 0x00,0xD8,0xA0,0x7E = fcmle s0, s0, #0.0 # ENC_FCMGT_ASISDSAME_ONLY 0x00,0xE4,0xA0,0x7E = fcmgt s0, s0, s0 # ENC_FACGT_ASISDSAME_ONLY 0x00,0xEC,0xA0,0x7E = facgt s0, s0, s0 # ENC_FCVTPU_ASISDMISC_R 0x00,0xA8,0xA1,0x7E = fcvtpu s0, s0 # ENC_FCVTZU_ASISDMISC_R 0x00,0xB8,0xA1,0x7E = fcvtzu s0, s0 # ENC_FRSQRTE_ASISDMISC_R 0x00,0xD8,0xA1,0x7E = frsqrte s0, s0 # ENC_FMINNMP_ASISDPAIR_ONLY_SD 0x00,0xC8,0xB0,0x7E = fminnmp s0, v0.2s # ENC_FMINP_ASISDPAIR_ONLY_SD 0x00,0xF8,0xB0,0x7E = fminp s0, v0.2s # ENC_FABD_ASISDSAMEFP16_ONLY 0x00,0x14,0xC0,0x7E = fabd h0, h0, h0 # ENC_FCMGT_ASISDSAMEFP16_ONLY 0x00,0x24,0xC0,0x7E = fcmgt h0, h0, h0 # ENC_FACGT_ASISDSAMEFP16_ONLY 0x00,0x2C,0xC0,0x7E = facgt h0, h0, h0 # ENC_FCMGE_ASISDMISCFP16_FZ 0x00,0xC8,0xF8,0x7E = fcmge h0, h0, #0.0 # ENC_FCMLE_ASISDMISCFP16_FZ 0x00,0xD8,0xF8,0x7E = fcmle h0, h0, #0.0 # ENC_FCVTPU_ASISDMISCFP16_R 0x00,0xA8,0xF9,0x7E = fcvtpu h0, h0 # ENC_FCVTZU_ASISDMISCFP16_R 0x00,0xB8,0xF9,0x7E = fcvtzu h0, h0 # ENC_FRSQRTE_ASISDMISCFP16_R 0x00,0xD8,0xF9,0x7E = frsqrte h0, h0 # ENC_FMULX_ASISDELEM_RH_H 0x00,0x90,0x00,0x7F = fmulx h0, h0, v0.h[0] # ENC_SQRDMLAH_ASISDELEM_R 0x00,0xD0,0x00,0x7F = fmulx h0, h0, v0.h[0] # ENC_SQRDMLSH_ASISDELEM_R 0x00,0xF0,0x00,0x7F = fmulx h0, h0, v0.h[0] # ENC_USHR_ASISDSHF_R 0x00,0x04,0x08,0x7F = fmulx h0, h0, v0.h[0] # ENC_USRA_ASISDSHF_R 0x00,0x14,0x08,0x7F = fmulx h0, h0, v0.h[0] # ENC_URSHR_ASISDSHF_R 0x00,0x24,0x08,0x7F = fmulx h0, h0, v0.h[0] # ENC_URSRA_ASISDSHF_R 0x00,0x34,0x08,0x7F = fmulx h0, h0, v0.h[0] # ENC_SRI_ASISDSHF_R 0x00,0x44,0x08,0x7F = fmulx h0, h0, v0.h[0] # ENC_SLI_ASISDSHF_R 0x00,0x54,0x08,0x7F = fmulx h0, h0, v0.h[0] # ENC_SQSHLU_ASISDSHF_R 0x00,0x64,0x08,0x7F = sqshlu b0, b0, #0 # ENC_UQSHL_ASISDSHF_R 0x00,0x74,0x08,0x7F = uqshl b0, b0, #0 # ENC_SQSHRUN_ASISDSHF_N 0x00,0x84,0x08,0x7F = sqshrun b0, h0, #8 # ENC_SQRSHRUN_ASISDSHF_N 0x00,0x8C,0x08,0x7F = sqrshrun b0, h0, #8 # ENC_UQSHRN_ASISDSHF_N 0x00,0x94,0x08,0x7F = uqshrn b0, h0, #8 # ENC_UQRSHRN_ASISDSHF_N 0x00,0x9C,0x08,0x7F = uqrshrn b0, h0, #8 # ENC_UCVTF_ASISDSHF_C 0x00,0xE4,0x08,0x7F = uqrshrn b0, h0, #8 # ENC_FCVTZU_ASISDSHF_C 0x00,0xFC,0x08,0x7F = uqrshrn b0, h0, #8 # ENC_FMULX_ASISDELEM_R_SD 0x00,0x90,0x80,0x7F = fmulx s0, s0, v0.s[0] # ENC_LD1SB_Z_P_BZ_S_X32_UNSCALED 0x00,0x00,0x00,0x84 = fmulx s0, s0, v0.s[0] # ENC_LDFF1SB_Z_P_BZ_S_X32_UNSCALED 0x00,0x20,0x00,0x84 = fmulx s0, s0, v0.s[0] # ENC_LD1B_Z_P_BZ_S_X32_UNSCALED 0x00,0x40,0x00,0x84 = fmulx s0, s0, v0.s[0] # ENC_LDFF1B_Z_P_BZ_S_X32_UNSCALED 0x00,0x60,0x00,0x84 = fmulx s0, s0, v0.s[0] # ENC_PRFB_I_P_BR_S 0x00,0xC0,0x00,0x84 = fmulx s0, s0, v0.s[0] # ENC_PRFB_I_P_AI_S 0x00,0xE0,0x00,0x84 = fmulx s0, s0, v0.s[0] # ENC_PRFB_I_P_BZ_S_X32_SCALED 0x00,0x00,0x20,0x84 = fmulx s0, s0, v0.s[0] # ENC_PRFH_I_P_BZ_S_X32_SCALED 0x00,0x20,0x20,0x84 = fmulx s0, s0, v0.s[0] # ENC_PRFW_I_P_BZ_S_X32_SCALED 0x00,0x40,0x20,0x84 = fmulx s0, s0, v0.s[0] # ENC_PRFD_I_P_BZ_S_X32_SCALED 0x00,0x60,0x20,0x84 = fmulx s0, s0, v0.s[0] # ENC_LD1SB_Z_P_AI_S 0x00,0x80,0x20,0x84 = fmulx s0, s0, v0.s[0] # ENC_LDFF1SB_Z_P_AI_S 0x00,0xA0,0x20,0x84 = fmulx s0, s0, v0.s[0] # ENC_LD1B_Z_P_AI_S 0x00,0xC0,0x20,0x84 = fmulx s0, s0, v0.s[0] # ENC_LDFF1B_Z_P_AI_S 0x00,0xE0,0x20,0x84 = fmulx s0, s0, v0.s[0] # ENC_LD1RB_Z_P_BI_U8 0x00,0x80,0x40,0x84 = fmulx s0, s0, v0.s[0] # ENC_LD1RB_Z_P_BI_U16 0x00,0xA0,0x40,0x84 = fmulx s0, s0, v0.s[0] # ENC_LD1RB_Z_P_BI_U32 0x00,0xC0,0x40,0x84 = fmulx s0, s0, v0.s[0] # ENC_LD1RB_Z_P_BI_U64 0x00,0xE0,0x40,0x84 = fmulx s0, s0, v0.s[0] # ENC_LD1SH_Z_P_BZ_S_X32_UNSCALED 0x00,0x00,0x80,0x84 = fmulx s0, s0, v0.s[0] # ENC_LDFF1SH_Z_P_BZ_S_X32_UNSCALED 0x00,0x20,0x80,0x84 = fmulx s0, s0, v0.s[0] # ENC_LD1H_Z_P_BZ_S_X32_UNSCALED 0x00,0x40,0x80,0x84 = fmulx s0, s0, v0.s[0] # ENC_LDFF1H_Z_P_BZ_S_X32_UNSCALED 0x00,0x60,0x80,0x84 = fmulx s0, s0, v0.s[0] # ENC_PRFH_I_P_BR_S 0x00,0xC0,0x80,0x84 = fmulx s0, s0, v0.s[0] # ENC_PRFH_I_P_AI_S 0x00,0xE0,0x80,0x84 = fmulx s0, s0, v0.s[0] # ENC_LD1SH_Z_P_BZ_S_X32_SCALED 0x00,0x00,0xA0,0x84 = fmulx s0, s0, v0.s[0] # ENC_LDFF1SH_Z_P_BZ_S_X32_SCALED 0x00,0x20,0xA0,0x84 = fmulx s0, s0, v0.s[0] # ENC_LD1H_Z_P_BZ_S_X32_SCALED 0x00,0x40,0xA0,0x84 = fmulx s0, s0, v0.s[0] # ENC_LDFF1H_Z_P_BZ_S_X32_SCALED 0x00,0x60,0xA0,0x84 = fmulx s0, s0, v0.s[0] # ENC_LD1SH_Z_P_AI_S 0x00,0x80,0xA0,0x84 = fmulx s0, s0, v0.s[0] # ENC_LDFF1SH_Z_P_AI_S 0x00,0xA0,0xA0,0x84 = fmulx s0, s0, v0.s[0] # ENC_LD1H_Z_P_AI_S 0x00,0xC0,0xA0,0x84 = fmulx s0, s0, v0.s[0] # ENC_LDFF1H_Z_P_AI_S 0x00,0xE0,0xA0,0x84 = fmulx s0, s0, v0.s[0] # ENC_LD1RSW_Z_P_BI_S64 0x00,0x80,0xC0,0x84 = fmulx s0, s0, v0.s[0] # ENC_LD1RH_Z_P_BI_U16 0x00,0xA0,0xC0,0x84 = fmulx s0, s0, v0.s[0] # ENC_LD1RH_Z_P_BI_U32 0x00,0xC0,0xC0,0x84 = fmulx s0, s0, v0.s[0] # ENC_LD1RH_Z_P_BI_U64 0x00,0xE0,0xC0,0x84 = fmulx s0, s0, v0.s[0] # ENC_LD1W_Z_P_BZ_S_X32_UNSCALED 0x00,0x40,0x00,0x85 = fmulx s0, s0, v0.s[0] # ENC_LDFF1W_Z_P_BZ_S_X32_UNSCALED 0x00,0x60,0x00,0x85 = fmulx s0, s0, v0.s[0] # ENC_PRFW_I_P_BR_S 0x00,0xC0,0x00,0x85 = fmulx s0, s0, v0.s[0] # ENC_PRFW_I_P_AI_S 0x00,0xE0,0x00,0x85 = fmulx s0, s0, v0.s[0] # ENC_LD1W_Z_P_BZ_S_X32_SCALED 0x00,0x40,0x20,0x85 = fmulx s0, s0, v0.s[0] # ENC_LDFF1W_Z_P_BZ_S_X32_SCALED 0x00,0x60,0x20,0x85 = fmulx s0, s0, v0.s[0] # ENC_LD1W_Z_P_AI_S 0x00,0xC0,0x20,0x85 = fmulx s0, s0, v0.s[0] # ENC_LDFF1W_Z_P_AI_S 0x00,0xE0,0x20,0x85 = fmulx s0, s0, v0.s[0] # ENC_LD1RSH_Z_P_BI_S64 0x00,0x80,0x40,0x85 = fmulx s0, s0, v0.s[0] # ENC_LD1RSH_Z_P_BI_S32 0x00,0xA0,0x40,0x85 = fmulx s0, s0, v0.s[0] # ENC_LD1RW_Z_P_BI_U32 0x00,0xC0,0x40,0x85 = fmulx s0, s0, v0.s[0] # ENC_LD1RW_Z_P_BI_U64 0x00,0xE0,0x40,0x85 = fmulx s0, s0, v0.s[0] # ENC_LDR_P_BI_ 0x00,0x00,0x80,0x85 = fmulx s0, s0, v0.s[0] # ENC_LDR_Z_BI_ 0x00,0x40,0x80,0x85 = fmulx s0, s0, v0.s[0] # ENC_PRFD_I_P_BR_S 0x00,0xC0,0x80,0x85 = fmulx s0, s0, v0.s[0] # ENC_PRFD_I_P_AI_S 0x00,0xE0,0x80,0x85 = fmulx s0, s0, v0.s[0] # ENC_PRFB_I_P_BI_S 0x00,0x00,0xC0,0x85 = fmulx s0, s0, v0.s[0] # ENC_PRFH_I_P_BI_S 0x00,0x20,0xC0,0x85 = fmulx s0, s0, v0.s[0] # ENC_PRFW_I_P_BI_S 0x00,0x40,0xC0,0x85 = fmulx s0, s0, v0.s[0] # ENC_PRFD_I_P_BI_S 0x00,0x60,0xC0,0x85 = fmulx s0, s0, v0.s[0] # ENC_LD1RSB_Z_P_BI_S64 0x00,0x80,0xC0,0x85 = fmulx s0, s0, v0.s[0] # ENC_LD1RSB_Z_P_BI_S32 0x00,0xA0,0xC0,0x85 = fmulx s0, s0, v0.s[0] # ENC_LD1RSB_Z_P_BI_S16 0x00,0xC0,0xC0,0x85 = fmulx s0, s0, v0.s[0] # ENC_LD1RD_Z_P_BI_U64 0x00,0xE0,0xC0,0x85 = fmulx s0, s0, v0.s[0] # ENC_STXR_SR32_LDSTEXCL 0x00,0x7C,0x00,0x88 = stxr w0, w0, [x0] # ENC_STLXR_SR32_LDSTEXCL 0x00,0xFC,0x00,0x88 = stlxr w0, w0, [x0] # ENC_STXP_SP32_LDSTEXCL 0x00,0x00,0x20,0x88 = stxp w0, w0, w0, [x0] # ENC_STLXP_SP32_LDSTEXCL 0x00,0x80,0x20,0x88 = stlxp w0, w0, w0, [x0] # ENC_LDXR_LR32_LDSTEXCL 0x00,0x7C,0x5F,0x88 = ldxr w0, [x0] # ENC_LDAXR_LR32_LDSTEXCL 0x00,0xFC,0x5F,0x88 = ldaxr w0, [x0] # ENC_LDXP_LP32_LDSTEXCL 0x00,0x00,0x7F,0x88 = ldaxr w0, [x0] # ENC_LDAXP_LP32_LDSTEXCL 0x00,0x80,0x7F,0x88 = ldaxr w0, [x0] # ENC_STLLR_SL32_LDSTEXCL 0x00,0x7C,0x9F,0x88 = stllr w0, [x0] # ENC_STLR_SL32_LDSTEXCL 0x00,0xFC,0x9F,0x88 = stlr w0, [x0] # ENC_CAS_C32_LDSTEXCL 0x00,0x7C,0xA0,0x88 = cas w0, w0, [x0] # ENC_CASL_C32_LDSTEXCL 0x00,0xFC,0xA0,0x88 = casl w0, w0, [x0] # ENC_LDLAR_LR32_LDSTEXCL 0x00,0x7C,0xDF,0x88 = ldlar w0, [x0] # ENC_LDAR_LR32_LDSTEXCL 0x00,0xFC,0xDF,0x88 = ldar w0, [x0] # ENC_CASA_C32_LDSTEXCL 0x00,0x7C,0xE0,0x88 = casa w0, w0, [x0] # ENC_CASAL_C32_LDSTEXCL 0x00,0xFC,0xE0,0x88 = casal w0, w0, [x0] # ENC_AND_64_LOG_SHIFT 0x00,0x00,0x00,0x8A = and x0, x0, x0 # ENC_BIC_64_LOG_SHIFT 0x00,0x00,0x20,0x8A = bic x0, x0, x0 # ENC_ADD_64_ADDSUB_SHIFT 0x00,0x00,0x00,0x8B = add x0, x0, x0 # ENC_ADD_64_ADDSUB_EXT 0x00,0x00,0x20,0x8B = add x0, x0, w0, uxtb # ENC_ADRP_ONLY_PCRELADDR 0x00,0x00,0x00,0x90 = adrp x0, 0 // 0x0 # ENC_ADD_64_ADDSUB_IMM 0x00,0x00,0x00,0x91 = add x0, x0, #0 # ENC_MOV_ADD_64_ADDSUB_IMM 0x1F,0x00,0x00,0x91 = mov sp, x0 # ENC_ADDG_64_ADDSUB_IMMTAGS 0x00,0x00,0x80,0x91 = addg x0, x0, #0, #0 # ENC_AND_64_LOG_IMM 0x00,0x00,0x00,0x92 = and x0, x0, #0x100000001 # ENC_MOV_MOVN_64_MOVEWIDE 0x00,0x00,0x80,0x92 = mov x0, #-1 # ENC_MOVN_64_MOVEWIDE 0x00,0x00,0xA0,0x92 = movn x0, #0, lsl #16 # ENC_SBFX_SBFM_64M_BITFIELD 0x00,0x00,0x40,0x93 = sbfx x0, x0, #0, #1 # ENC_SXTB_SBFM_64M_BITFIELD 0x00,0x1C,0x40,0x93 = sxtb x0, w0 # ENC_SXTH_SBFM_64M_BITFIELD 0x00,0x3C,0x40,0x93 = sxth x0, w0 # ENC_SXTW_SBFM_64M_BITFIELD 0x00,0x7C,0x40,0x93 = sxtw x0, w0 # ENC_ASR_SBFM_64M_BITFIELD 0x00,0xFC,0x40,0x93 = asr x0, x0, #0 # ENC_SBFIZ_SBFM_64M_BITFIELD 0x00,0x00,0x41,0x93 = sbfiz x0, x0, #63, #1 # ENC_ROR_EXTR_64_EXTRACT 0x00,0x00,0xC0,0x93 = ror x0, x0, #0 # ENC_EXTR_64_EXTRACT 0x20,0x00,0xC0,0x93 = extr x0, x1, x0, #0 # ENC_BL_ONLY_BRANCH_IMM 0x00,0x00,0x00,0x94 = bl 0x0 # ENC_LDRSW_64_LOADLIT 0x00,0x00,0x00,0x98 = ldrsw x0, 0x0 # ENC_STLUR_32_LDAPSTL_UNSCALED 0x00,0x00,0x00,0x99 = stlur w0, [x0] # ENC_LDAPUR_32_LDAPSTL_UNSCALED 0x00,0x00,0x40,0x99 = ldapur w0, [x0] # ENC_LDAPURSW_64_LDAPSTL_UNSCALED 0x00,0x00,0x80,0x99 = ldapursw x0, [x0] # ENC_ADC_64_ADDSUB_CARRY 0x00,0x00,0x00,0x9A = adc x0, x0, x0 # ENC_CSEL_64_CONDSEL 0x00,0x00,0x80,0x9A = csel x0, x0, x0, eq # ENC_CINC_CSINC_64_CONDSEL 0x00,0x04,0x80,0x9A = cinc x0, x0, ne # ENC_CSINC_64_CONDSEL 0x20,0x04,0x80,0x9A = csinc x0, x1, x0, eq # ENC_CSET_CSINC_64_CONDSEL 0xE0,0x07,0x9F,0x9A = cset x0, ne # ENC_SUBP_64S_DP_2SRC 0x00,0x00,0xC0,0x9A = subp x0, x0, x0 # ENC_UDIV_64_DP_2SRC 0x00,0x08,0xC0,0x9A = udiv x0, x0, x0 # ENC_SDIV_64_DP_2SRC 0x00,0x0C,0xC0,0x9A = sdiv x0, x0, x0 # ENC_IRG_64I_DP_2SRC 0x00,0x10,0xC0,0x9A = irg x0, x0, x0 # ENC_GMI_64G_DP_2SRC 0x00,0x14,0xC0,0x9A = gmi x0, x0, x0 # ENC_LSL_LSLV_64_DP_2SRC 0x00,0x20,0xC0,0x9A = lsl x0, x0, x0 # ENC_LSR_LSRV_64_DP_2SRC 0x00,0x24,0xC0,0x9A = lsr x0, x0, x0 # ENC_ASR_ASRV_64_DP_2SRC 0x00,0x28,0xC0,0x9A = asr x0, x0, x0 # ENC_ROR_RORV_64_DP_2SRC 0x00,0x2C,0xC0,0x9A = ror x0, x0, x0 # ENC_PACGA_64P_DP_2SRC 0x00,0x30,0xC0,0x9A = pacga x0, x0, x0 # ENC_CRC32X_64C_DP_2SRC 0x00,0x4C,0xC0,0x9A = crc32x w0, w0, x0 # ENC_CRC32CX_64C_DP_2SRC 0x00,0x5C,0xC0,0x9A = crc32cx w0, w0, x0 # ENC_MADD_64A_DP_3SRC 0x00,0x00,0x00,0x9B = madd x0, x0, x0, x0 # ENC_MUL_MADD_64A_DP_3SRC 0x00,0x7C,0x00,0x9B = mul x0, x0, x0 # ENC_MSUB_64A_DP_3SRC 0x00,0x80,0x00,0x9B = msub x0, x0, x0, x0 # ENC_MNEG_MSUB_64A_DP_3SRC 0x00,0xFC,0x00,0x9B = mneg x0, x0, x0 # ENC_SMADDL_64WA_DP_3SRC 0x00,0x00,0x20,0x9B = smaddl x0, w0, w0, x0 # ENC_SMULL_SMADDL_64WA_DP_3SRC 0x00,0x7C,0x20,0x9B = smull x0, w0, w0 # ENC_SMSUBL_64WA_DP_3SRC 0x00,0x80,0x20,0x9B = smsubl x0, w0, w0, x0 # ENC_SMNEGL_SMSUBL_64WA_DP_3SRC 0x00,0xFC,0x20,0x9B = smnegl x0, w0, w0 # ENC_SMULH_64_DP_3SRC 0x00,0x7C,0x40,0x9B = smulh x0, x0, x0 # ENC_UMADDL_64WA_DP_3SRC 0x00,0x00,0xA0,0x9B = umaddl x0, w0, w0, x0 # ENC_UMULL_UMADDL_64WA_DP_3SRC 0x00,0x7C,0xA0,0x9B = umull x0, w0, w0 # ENC_UMSUBL_64WA_DP_3SRC 0x00,0x80,0xA0,0x9B = umsubl x0, w0, w0, x0 # ENC_UMNEGL_UMSUBL_64WA_DP_3SRC 0x00,0xFC,0xA0,0x9B = umnegl x0, w0, w0 # ENC_UMULH_64_DP_3SRC 0x00,0x7C,0xC0,0x9B = umulh x0, x0, x0 # ENC_LDR_Q_LOADLIT 0x00,0x00,0x00,0x9C = ldr q0, 0x0 # ENC_SCVTF_S64_FLOAT2FIX 0x00,0x00,0x02,0x9E = scvtf s0, x0, #64 # ENC_UCVTF_S64_FLOAT2FIX 0x00,0x00,0x03,0x9E = ucvtf s0, x0, #64 # ENC_FCVTZS_64S_FLOAT2FIX 0x00,0x00,0x18,0x9E = fcvtzs x0, s0, #64 # ENC_FCVTZU_64S_FLOAT2FIX 0x00,0x00,0x19,0x9E = fcvtzu x0, s0, #64 # ENC_FCVTNS_64S_FLOAT2INT 0x00,0x00,0x20,0x9E = fcvtns x0, s0 # ENC_FCVTNU_64S_FLOAT2INT 0x00,0x00,0x21,0x9E = fcvtnu x0, s0 # ENC_SCVTF_S64_FLOAT2INT 0x00,0x00,0x22,0x9E = scvtf s0, x0 # ENC_UCVTF_S64_FLOAT2INT 0x00,0x00,0x23,0x9E = ucvtf s0, x0 # ENC_FCVTAS_64S_FLOAT2INT 0x00,0x00,0x24,0x9E = fcvtas x0, s0 # ENC_FCVTAU_64S_FLOAT2INT 0x00,0x00,0x25,0x9E = fcvtau x0, s0 # ENC_FCVTPS_64S_FLOAT2INT 0x00,0x00,0x28,0x9E = fcvtps x0, s0 # ENC_FCVTPU_64S_FLOAT2INT 0x00,0x00,0x29,0x9E = fcvtpu x0, s0 # ENC_FCVTMS_64S_FLOAT2INT 0x00,0x00,0x30,0x9E = fcvtms x0, s0 # ENC_FCVTMU_64S_FLOAT2INT 0x00,0x00,0x31,0x9E = fcvtmu x0, s0 # ENC_FCVTZS_64S_FLOAT2INT 0x00,0x00,0x38,0x9E = fcvtzs x0, s0 # ENC_FCVTZU_64S_FLOAT2INT 0x00,0x00,0x39,0x9E = fcvtzu x0, s0 # ENC_SCVTF_D64_FLOAT2FIX 0x00,0x00,0x42,0x9E = scvtf d0, x0, #64 # ENC_UCVTF_D64_FLOAT2FIX 0x00,0x00,0x43,0x9E = ucvtf d0, x0, #64 # ENC_FCVTZS_64D_FLOAT2FIX 0x00,0x00,0x58,0x9E = fcvtzs x0, d0, #64 # ENC_FCVTZU_64D_FLOAT2FIX 0x00,0x00,0x59,0x9E = fcvtzu x0, d0, #64 # ENC_FCVTNS_64D_FLOAT2INT 0x00,0x00,0x60,0x9E = fcvtns x0, d0 # ENC_FCVTNU_64D_FLOAT2INT 0x00,0x00,0x61,0x9E = fcvtnu x0, d0 # ENC_SCVTF_D64_FLOAT2INT 0x00,0x00,0x62,0x9E = scvtf d0, x0 # ENC_UCVTF_D64_FLOAT2INT 0x00,0x00,0x63,0x9E = ucvtf d0, x0 # ENC_FCVTAS_64D_FLOAT2INT 0x00,0x00,0x64,0x9E = fcvtas x0, d0 # ENC_FCVTAU_64D_FLOAT2INT 0x00,0x00,0x65,0x9E = fcvtau x0, d0 # ENC_FMOV_64D_FLOAT2INT 0x00,0x00,0x66,0x9E = fmov x0, d0 # ENC_FMOV_D64_FLOAT2INT 0x00,0x00,0x67,0x9E = fmov d0, x0 # ENC_FCVTPS_64D_FLOAT2INT 0x00,0x00,0x68,0x9E = fcvtps x0, d0 # ENC_FCVTPU_64D_FLOAT2INT 0x00,0x00,0x69,0x9E = fcvtpu x0, d0 # ENC_FCVTMS_64D_FLOAT2INT 0x00,0x00,0x70,0x9E = fcvtms x0, d0 # ENC_FCVTMU_64D_FLOAT2INT 0x00,0x00,0x71,0x9E = fcvtmu x0, d0 # ENC_FCVTZS_64D_FLOAT2INT 0x00,0x00,0x78,0x9E = fcvtzs x0, d0 # ENC_FCVTZU_64D_FLOAT2INT 0x00,0x00,0x79,0x9E = fcvtzu x0, d0 # ENC_FMOV_64VX_FLOAT2INT 0x00,0x00,0xAE,0x9E = fmov x0, v0.d[1] # ENC_FMOV_V64I_FLOAT2INT 0x00,0x00,0xAF,0x9E = fmov v0.d[1], x0 # ENC_SCVTF_H64_FLOAT2FIX 0x00,0x00,0xC2,0x9E = scvtf h0, x0, #64 # ENC_UCVTF_H64_FLOAT2FIX 0x00,0x00,0xC3,0x9E = ucvtf h0, x0, #64 # ENC_FCVTZS_64H_FLOAT2FIX 0x00,0x00,0xD8,0x9E = fcvtzs x0, h0, #64 # ENC_FCVTZU_64H_FLOAT2FIX 0x00,0x00,0xD9,0x9E = fcvtzu x0, h0, #64 # ENC_FCVTNS_64H_FLOAT2INT 0x00,0x00,0xE0,0x9E = fcvtns x0, h0 # ENC_FCVTNU_64H_FLOAT2INT 0x00,0x00,0xE1,0x9E = fcvtnu x0, h0 # ENC_SCVTF_H64_FLOAT2INT 0x00,0x00,0xE2,0x9E = scvtf h0, x0 # ENC_UCVTF_H64_FLOAT2INT 0x00,0x00,0xE3,0x9E = ucvtf h0, x0 # ENC_FCVTAS_64H_FLOAT2INT 0x00,0x00,0xE4,0x9E = fcvtas x0, h0 # ENC_FCVTAU_64H_FLOAT2INT 0x00,0x00,0xE5,0x9E = fcvtau x0, h0 # ENC_FMOV_64H_FLOAT2INT 0x00,0x00,0xE6,0x9E = fmov x0, h0 # ENC_FMOV_H64_FLOAT2INT 0x00,0x00,0xE7,0x9E = fmov h0, x0 # ENC_FCVTPS_64H_FLOAT2INT 0x00,0x00,0xE8,0x9E = fcvtps x0, h0 # ENC_FCVTPU_64H_FLOAT2INT 0x00,0x00,0xE9,0x9E = fcvtpu x0, h0 # ENC_FCVTMS_64H_FLOAT2INT 0x00,0x00,0xF0,0x9E = fcvtms x0, h0 # ENC_FCVTMU_64H_FLOAT2INT 0x00,0x00,0xF1,0x9E = fcvtmu x0, h0 # ENC_FCVTZS_64H_FLOAT2INT 0x00,0x00,0xF8,0x9E = fcvtzs x0, h0 # ENC_FCVTZU_64H_FLOAT2INT 0x00,0x00,0xF9,0x9E = fcvtzu x0, h0 # ENC_LD1RQB_Z_P_BR_CONTIGUOUS 0x00,0x00,0x00,0xA4 = fcvtzu x0, h0 # ENC_LD1RQB_Z_P_BI_U8 0x00,0x20,0x00,0xA4 = fcvtzu x0, h0 # ENC_LD1B_Z_P_BR_U8 0x00,0x40,0x00,0xA4 = fcvtzu x0, h0 # ENC_LDFF1B_Z_P_BR_U8 0x00,0x60,0x00,0xA4 = fcvtzu x0, h0 # ENC_LD1B_Z_P_BI_U8 0x00,0xA0,0x00,0xA4 = fcvtzu x0, h0 # ENC_LDNT1B_Z_P_BR_CONTIGUOUS 0x00,0xC0,0x00,0xA4 = fcvtzu x0, h0 # ENC_LDNT1B_Z_P_BI_CONTIGUOUS 0x00,0xE0,0x00,0xA4 = fcvtzu x0, h0 # ENC_LDNF1B_Z_P_BI_U8 0x00,0xA0,0x10,0xA4 = fcvtzu x0, h0 # ENC_LD1ROB_Z_P_BR_CONTIGUOUS 0x00,0x00,0x20,0xA4 = fcvtzu x0, h0 # ENC_LD1ROB_Z_P_BI_U8 0x00,0x20,0x20,0xA4 = fcvtzu x0, h0 # ENC_LD1B_Z_P_BR_U16 0x00,0x40,0x20,0xA4 = fcvtzu x0, h0 # ENC_LDFF1B_Z_P_BR_U16 0x00,0x60,0x20,0xA4 = fcvtzu x0, h0 # ENC_LD1B_Z_P_BI_U16 0x00,0xA0,0x20,0xA4 = fcvtzu x0, h0 # ENC_LD2B_Z_P_BR_CONTIGUOUS 0x00,0xC0,0x20,0xA4 = fcvtzu x0, h0 # ENC_LD2B_Z_P_BI_CONTIGUOUS 0x00,0xE0,0x20,0xA4 = fcvtzu x0, h0 # ENC_LDNF1B_Z_P_BI_U16 0x00,0xA0,0x30,0xA4 = fcvtzu x0, h0 # ENC_LD1B_Z_P_BR_U32 0x00,0x40,0x40,0xA4 = fcvtzu x0, h0 # ENC_LDFF1B_Z_P_BR_U32 0x00,0x60,0x40,0xA4 = fcvtzu x0, h0 # ENC_LD1B_Z_P_BI_U32 0x00,0xA0,0x40,0xA4 = fcvtzu x0, h0 # ENC_LD3B_Z_P_BR_CONTIGUOUS 0x00,0xC0,0x40,0xA4 = fcvtzu x0, h0 # ENC_LD3B_Z_P_BI_CONTIGUOUS 0x00,0xE0,0x40,0xA4 = fcvtzu x0, h0 # ENC_LDNF1B_Z_P_BI_U32 0x00,0xA0,0x50,0xA4 = fcvtzu x0, h0 # ENC_LD1B_Z_P_BR_U64 0x00,0x40,0x60,0xA4 = fcvtzu x0, h0 # ENC_LDFF1B_Z_P_BR_U64 0x00,0x60,0x60,0xA4 = fcvtzu x0, h0 # ENC_LD1B_Z_P_BI_U64 0x00,0xA0,0x60,0xA4 = fcvtzu x0, h0 # ENC_LD4B_Z_P_BR_CONTIGUOUS 0x00,0xC0,0x60,0xA4 = fcvtzu x0, h0 # ENC_LD4B_Z_P_BI_CONTIGUOUS 0x00,0xE0,0x60,0xA4 = fcvtzu x0, h0 # ENC_LDNF1B_Z_P_BI_U64 0x00,0xA0,0x70,0xA4 = fcvtzu x0, h0 # ENC_LD1RQH_Z_P_BR_CONTIGUOUS 0x00,0x00,0x80,0xA4 = fcvtzu x0, h0 # ENC_LD1RQH_Z_P_BI_U16 0x00,0x20,0x80,0xA4 = fcvtzu x0, h0 # ENC_LD1SW_Z_P_BR_S64 0x00,0x40,0x80,0xA4 = fcvtzu x0, h0 # ENC_LDFF1SW_Z_P_BR_S64 0x00,0x60,0x80,0xA4 = fcvtzu x0, h0 # ENC_LD1SW_Z_P_BI_S64 0x00,0xA0,0x80,0xA4 = fcvtzu x0, h0 # ENC_LDNT1H_Z_P_BR_CONTIGUOUS 0x00,0xC0,0x80,0xA4 = fcvtzu x0, h0 # ENC_LDNT1H_Z_P_BI_CONTIGUOUS 0x00,0xE0,0x80,0xA4 = fcvtzu x0, h0 # ENC_LDNF1SW_Z_P_BI_S64 0x00,0xA0,0x90,0xA4 = fcvtzu x0, h0 # ENC_LD1ROH_Z_P_BR_CONTIGUOUS 0x00,0x00,0xA0,0xA4 = fcvtzu x0, h0 # ENC_LD1ROH_Z_P_BI_U16 0x00,0x20,0xA0,0xA4 = fcvtzu x0, h0 # ENC_LD1H_Z_P_BR_U16 0x00,0x40,0xA0,0xA4 = fcvtzu x0, h0 # ENC_LDFF1H_Z_P_BR_U16 0x00,0x60,0xA0,0xA4 = fcvtzu x0, h0 # ENC_LD1H_Z_P_BI_U16 0x00,0xA0,0xA0,0xA4 = fcvtzu x0, h0 # ENC_LD2H_Z_P_BR_CONTIGUOUS 0x00,0xC0,0xA0,0xA4 = fcvtzu x0, h0 # ENC_LD2H_Z_P_BI_CONTIGUOUS 0x00,0xE0,0xA0,0xA4 = fcvtzu x0, h0 # ENC_LDNF1H_Z_P_BI_U16 0x00,0xA0,0xB0,0xA4 = fcvtzu x0, h0 # ENC_LD1H_Z_P_BR_U32 0x00,0x40,0xC0,0xA4 = fcvtzu x0, h0 # ENC_LDFF1H_Z_P_BR_U32 0x00,0x60,0xC0,0xA4 = fcvtzu x0, h0 # ENC_LD1H_Z_P_BI_U32 0x00,0xA0,0xC0,0xA4 = fcvtzu x0, h0 # ENC_LD3H_Z_P_BR_CONTIGUOUS 0x00,0xC0,0xC0,0xA4 = fcvtzu x0, h0 # ENC_LD3H_Z_P_BI_CONTIGUOUS 0x00,0xE0,0xC0,0xA4 = fcvtzu x0, h0 # ENC_LDNF1H_Z_P_BI_U32 0x00,0xA0,0xD0,0xA4 = fcvtzu x0, h0 # ENC_LD1H_Z_P_BR_U64 0x00,0x40,0xE0,0xA4 = fcvtzu x0, h0 # ENC_LDFF1H_Z_P_BR_U64 0x00,0x60,0xE0,0xA4 = fcvtzu x0, h0 # ENC_LD1H_Z_P_BI_U64 0x00,0xA0,0xE0,0xA4 = fcvtzu x0, h0 # ENC_LD4H_Z_P_BR_CONTIGUOUS 0x00,0xC0,0xE0,0xA4 = fcvtzu x0, h0 # ENC_LD4H_Z_P_BI_CONTIGUOUS 0x00,0xE0,0xE0,0xA4 = fcvtzu x0, h0 # ENC_LDNF1H_Z_P_BI_U64 0x00,0xA0,0xF0,0xA4 = fcvtzu x0, h0 # ENC_LD1RQW_Z_P_BR_CONTIGUOUS 0x00,0x00,0x00,0xA5 = fcvtzu x0, h0 # ENC_LD1RQW_Z_P_BI_U32 0x00,0x20,0x00,0xA5 = fcvtzu x0, h0 # ENC_LD1SH_Z_P_BR_S64 0x00,0x40,0x00,0xA5 = fcvtzu x0, h0 # ENC_LDFF1SH_Z_P_BR_S64 0x00,0x60,0x00,0xA5 = fcvtzu x0, h0 # ENC_LD1SH_Z_P_BI_S64 0x00,0xA0,0x00,0xA5 = fcvtzu x0, h0 # ENC_LDNT1W_Z_P_BR_CONTIGUOUS 0x00,0xC0,0x00,0xA5 = fcvtzu x0, h0 # ENC_LDNT1W_Z_P_BI_CONTIGUOUS 0x00,0xE0,0x00,0xA5 = fcvtzu x0, h0 # ENC_LDNF1SH_Z_P_BI_S64 0x00,0xA0,0x10,0xA5 = fcvtzu x0, h0 # ENC_LD1ROW_Z_P_BR_CONTIGUOUS 0x00,0x00,0x20,0xA5 = fcvtzu x0, h0 # ENC_LD1ROW_Z_P_BI_U32 0x00,0x20,0x20,0xA5 = fcvtzu x0, h0 # ENC_LD1SH_Z_P_BR_S32 0x00,0x40,0x20,0xA5 = fcvtzu x0, h0 # ENC_LDFF1SH_Z_P_BR_S32 0x00,0x60,0x20,0xA5 = fcvtzu x0, h0 # ENC_LD1SH_Z_P_BI_S32 0x00,0xA0,0x20,0xA5 = fcvtzu x0, h0 # ENC_LD2W_Z_P_BR_CONTIGUOUS 0x00,0xC0,0x20,0xA5 = fcvtzu x0, h0 # ENC_LD2W_Z_P_BI_CONTIGUOUS 0x00,0xE0,0x20,0xA5 = fcvtzu x0, h0 # ENC_LDNF1SH_Z_P_BI_S32 0x00,0xA0,0x30,0xA5 = fcvtzu x0, h0 # ENC_LD1W_Z_P_BR_U32 0x00,0x40,0x40,0xA5 = fcvtzu x0, h0 # ENC_LDFF1W_Z_P_BR_U32 0x00,0x60,0x40,0xA5 = fcvtzu x0, h0 # ENC_LD1W_Z_P_BI_U32 0x00,0xA0,0x40,0xA5 = fcvtzu x0, h0 # ENC_LD3W_Z_P_BR_CONTIGUOUS 0x00,0xC0,0x40,0xA5 = fcvtzu x0, h0 # ENC_LD3W_Z_P_BI_CONTIGUOUS 0x00,0xE0,0x40,0xA5 = fcvtzu x0, h0 # ENC_LDNF1W_Z_P_BI_U32 0x00,0xA0,0x50,0xA5 = fcvtzu x0, h0 # ENC_LD1W_Z_P_BR_U64 0x00,0x40,0x60,0xA5 = fcvtzu x0, h0 # ENC_LDFF1W_Z_P_BR_U64 0x00,0x60,0x60,0xA5 = fcvtzu x0, h0 # ENC_LD1W_Z_P_BI_U64 0x00,0xA0,0x60,0xA5 = fcvtzu x0, h0 # ENC_LD4W_Z_P_BR_CONTIGUOUS 0x00,0xC0,0x60,0xA5 = fcvtzu x0, h0 # ENC_LD4W_Z_P_BI_CONTIGUOUS 0x00,0xE0,0x60,0xA5 = fcvtzu x0, h0 # ENC_LDNF1W_Z_P_BI_U64 0x00,0xA0,0x70,0xA5 = fcvtzu x0, h0 # ENC_LD1RQD_Z_P_BR_CONTIGUOUS 0x00,0x00,0x80,0xA5 = fcvtzu x0, h0 # ENC_LD1RQD_Z_P_BI_U64 0x00,0x20,0x80,0xA5 = fcvtzu x0, h0 # ENC_LD1SB_Z_P_BR_S64 0x00,0x40,0x80,0xA5 = fcvtzu x0, h0 # ENC_LDFF1SB_Z_P_BR_S64 0x00,0x60,0x80,0xA5 = fcvtzu x0, h0 # ENC_LD1SB_Z_P_BI_S64 0x00,0xA0,0x80,0xA5 = fcvtzu x0, h0 # ENC_LDNT1D_Z_P_BR_CONTIGUOUS 0x00,0xC0,0x80,0xA5 = fcvtzu x0, h0 # ENC_LDNT1D_Z_P_BI_CONTIGUOUS 0x00,0xE0,0x80,0xA5 = fcvtzu x0, h0 # ENC_LDNF1SB_Z_P_BI_S64 0x00,0xA0,0x90,0xA5 = fcvtzu x0, h0 # ENC_LD1ROD_Z_P_BR_CONTIGUOUS 0x00,0x00,0xA0,0xA5 = fcvtzu x0, h0 # ENC_LD1ROD_Z_P_BI_U64 0x00,0x20,0xA0,0xA5 = fcvtzu x0, h0 # ENC_LD1SB_Z_P_BR_S32 0x00,0x40,0xA0,0xA5 = fcvtzu x0, h0 # ENC_LDFF1SB_Z_P_BR_S32 0x00,0x60,0xA0,0xA5 = fcvtzu x0, h0 # ENC_LD1SB_Z_P_BI_S32 0x00,0xA0,0xA0,0xA5 = fcvtzu x0, h0 # ENC_LD2D_Z_P_BR_CONTIGUOUS 0x00,0xC0,0xA0,0xA5 = fcvtzu x0, h0 # ENC_LD2D_Z_P_BI_CONTIGUOUS 0x00,0xE0,0xA0,0xA5 = fcvtzu x0, h0 # ENC_LDNF1SB_Z_P_BI_S32 0x00,0xA0,0xB0,0xA5 = fcvtzu x0, h0 # ENC_LD1SB_Z_P_BR_S16 0x00,0x40,0xC0,0xA5 = fcvtzu x0, h0 # ENC_LDFF1SB_Z_P_BR_S16 0x00,0x60,0xC0,0xA5 = fcvtzu x0, h0 # ENC_LD1SB_Z_P_BI_S16 0x00,0xA0,0xC0,0xA5 = fcvtzu x0, h0 # ENC_LD3D_Z_P_BR_CONTIGUOUS 0x00,0xC0,0xC0,0xA5 = fcvtzu x0, h0 # ENC_LD3D_Z_P_BI_CONTIGUOUS 0x00,0xE0,0xC0,0xA5 = fcvtzu x0, h0 # ENC_LDNF1SB_Z_P_BI_S16 0x00,0xA0,0xD0,0xA5 = fcvtzu x0, h0 # ENC_LD1D_Z_P_BR_U64 0x00,0x40,0xE0,0xA5 = fcvtzu x0, h0 # ENC_LDFF1D_Z_P_BR_U64 0x00,0x60,0xE0,0xA5 = fcvtzu x0, h0 # ENC_LD1D_Z_P_BI_U64 0x00,0xA0,0xE0,0xA5 = fcvtzu x0, h0 # ENC_LD4D_Z_P_BR_CONTIGUOUS 0x00,0xC0,0xE0,0xA5 = fcvtzu x0, h0 # ENC_LD4D_Z_P_BI_CONTIGUOUS 0x00,0xE0,0xE0,0xA5 = fcvtzu x0, h0 # ENC_LDNF1D_Z_P_BI_U64 0x00,0xA0,0xF0,0xA5 = fcvtzu x0, h0 # ENC_STNP_64_LDSTNAPAIR_OFFS 0x00,0x00,0x00,0xA8 = stnp x0, x0, [x0] # ENC_LDNP_64_LDSTNAPAIR_OFFS 0x00,0x00,0x40,0xA8 = stnp x0, x0, [x0] # ENC_STP_64_LDSTPAIR_POST 0x00,0x00,0x80,0xA8 = stnp x0, x0, [x0] # ENC_LDP_64_LDSTPAIR_POST 0x00,0x00,0xC0,0xA8 = stnp x0, x0, [x0] # ENC_STP_64_LDSTPAIR_OFF 0x00,0x00,0x00,0xA9 = stp x0, x0, [x0] # ENC_LDP_64_LDSTPAIR_OFF 0x00,0x00,0x40,0xA9 = stp x0, x0, [x0] # ENC_STP_64_LDSTPAIR_PRE 0x00,0x00,0x80,0xA9 = stp x0, x0, [x0] # ENC_LDP_64_LDSTPAIR_PRE 0x00,0x00,0xC0,0xA9 = stp x0, x0, [x0] # ENC_ORR_64_LOG_SHIFT 0x00,0x00,0x00,0xAA = orr x0, x0, x0 # ENC_MOV_ORR_64_LOG_SHIFT 0xE0,0x03,0x00,0xAA = mov x0, x0 # ENC_ORN_64_LOG_SHIFT 0x00,0x00,0x20,0xAA = orn x0, x0, x0 # ENC_MVN_ORN_64_LOG_SHIFT 0xE0,0x03,0x20,0xAA = mvn x0, x0 # ENC_ADDS_64_ADDSUB_SHIFT 0x00,0x00,0x00,0xAB = adds x0, x0, x0 # ENC_CMN_ADDS_64_ADDSUB_SHIFT 0x1F,0x00,0x00,0xAB = cmn x0, x0 # ENC_ADDS_64S_ADDSUB_EXT 0x00,0x00,0x20,0xAB = adds x0, x0, w0, uxtb # ENC_CMN_ADDS_64S_ADDSUB_EXT 0x1F,0x00,0x20,0xAB = cmn x0, w0, uxtb # ENC_STNP_Q_LDSTNAPAIR_OFFS 0x00,0x00,0x00,0xAC = stnp q0, q0, [x0] # ENC_LDNP_Q_LDSTNAPAIR_OFFS 0x00,0x00,0x40,0xAC = stnp q0, q0, [x0] # ENC_STP_Q_LDSTPAIR_POST 0x00,0x00,0x80,0xAC = stp q0, q0, [x0], #0 # ENC_LDP_Q_LDSTPAIR_POST 0x00,0x00,0xC0,0xAC = stp q0, q0, [x0], #0 # ENC_STP_Q_LDSTPAIR_OFF 0x00,0x00,0x00,0xAD = stp q0, q0, [x0] # ENC_LDP_Q_LDSTPAIR_OFF 0x00,0x00,0x40,0xAD = stp q0, q0, [x0] # ENC_STP_Q_LDSTPAIR_PRE 0x00,0x00,0x80,0xAD = stp q0, q0, [x0, #0]! # ENC_LDP_Q_LDSTPAIR_PRE 0x00,0x00,0xC0,0xAD = stp q0, q0, [x0, #0]! # ENC_ADDS_64S_ADDSUB_IMM 0x00,0x00,0x00,0xB1 = adds x0, x0, #0 # ENC_CMN_ADDS_64S_ADDSUB_IMM 0x1F,0x00,0x00,0xB1 = cmn x0, #0 # ENC_ORR_64_LOG_IMM 0x00,0x00,0x00,0xB2 = orr x0, x0, #0x100000001 # ENC_MOV_ORR_64_LOG_IMM 0xE0,0x03,0x00,0xB2 = mov x0, #4294967297 # ENC_BFXIL_BFM_64M_BITFIELD 0x00,0x00,0x40,0xB3 = bfxil x0, x0, #0, #1 # ENC_BFI_BFM_64M_BITFIELD 0x00,0x00,0x41,0xB3 = bfi x0, x0, #63, #1 # ENC_BFC_BFM_64M_BITFIELD 0xE0,0x03,0x41,0xB3 = bfc x0, #63, #1 # ENC_CBZ_64_COMPBRANCH 0x00,0x00,0x00,0xB4 = cbz x0, 0x0 # ENC_CBNZ_64_COMPBRANCH 0x00,0x00,0x00,0xB5 = cbnz x0, 0x0 # ENC_STUR_32_LDST_UNSCALED 0x00,0x00,0x00,0xB8 = stur w0, [x0] # ENC_STR_32_LDST_IMMPOST 0x00,0x04,0x00,0xB8 = str w0, [x0], #0 # ENC_STTR_32_LDST_UNPRIV 0x00,0x08,0x00,0xB8 = sttr w0, [x0] # ENC_STR_32_LDST_IMMPRE 0x00,0x0C,0x00,0xB8 = str w0, [x0, #0]! # ENC_LDADD_32_MEMOP 0x00,0x00,0x20,0xB8 = ldadd w0, w0, [x0] # ENC_STADD_LDADD_32_MEMOP 0x1F,0x00,0x20,0xB8 = stadd w0, [x0] # ENC_STR_32_LDST_REGOFF 0x00,0x08,0x20,0xB8 = stadd w0, [x0] # ENC_LDCLR_32_MEMOP 0x00,0x10,0x20,0xB8 = ldclr w0, w0, [x0] # ENC_STCLR_LDCLR_32_MEMOP 0x1F,0x10,0x20,0xB8 = stclr w0, [x0] # ENC_LDEOR_32_MEMOP 0x00,0x20,0x20,0xB8 = ldeor w0, w0, [x0] # ENC_STEOR_LDEOR_32_MEMOP 0x1F,0x20,0x20,0xB8 = steor w0, [x0] # ENC_LDSET_32_MEMOP 0x00,0x30,0x20,0xB8 = ldset w0, w0, [x0] # ENC_STSET_LDSET_32_MEMOP 0x1F,0x30,0x20,0xB8 = stset w0, [x0] # ENC_LDSMAX_32_MEMOP 0x00,0x40,0x20,0xB8 = ldsmax w0, w0, [x0] # ENC_STSMAX_LDSMAX_32_MEMOP 0x1F,0x40,0x20,0xB8 = stsmax w0, [x0] # ENC_LDSMIN_32_MEMOP 0x00,0x50,0x20,0xB8 = ldsmin w0, w0, [x0] # ENC_STSMIN_LDSMIN_32_MEMOP 0x1F,0x50,0x20,0xB8 = stsmin w0, [x0] # ENC_LDUMAX_32_MEMOP 0x00,0x60,0x20,0xB8 = ldumax w0, w0, [x0] # ENC_STUMAX_LDUMAX_32_MEMOP 0x1F,0x60,0x20,0xB8 = stumax w0, [x0] # ENC_LDUMIN_32_MEMOP 0x00,0x70,0x20,0xB8 = ldumin w0, w0, [x0] # ENC_STUMIN_LDUMIN_32_MEMOP 0x1F,0x70,0x20,0xB8 = stumin w0, [x0] # ENC_SWP_32_MEMOP 0x00,0x80,0x20,0xB8 = swp w0, w0, [x0] # ENC_LDUR_32_LDST_UNSCALED 0x00,0x00,0x40,0xB8 = ldur w0, [x0] # ENC_LDR_32_LDST_IMMPOST 0x00,0x04,0x40,0xB8 = ldur w0, [x0] # ENC_LDTR_32_LDST_UNPRIV 0x00,0x08,0x40,0xB8 = ldur w0, [x0] # ENC_LDR_32_LDST_IMMPRE 0x00,0x0C,0x40,0xB8 = ldur w0, [x0] # ENC_LDADDL_32_MEMOP 0x00,0x00,0x60,0xB8 = ldaddl w0, w0, [x0] # ENC_STADDL_LDADDL_32_MEMOP 0x1F,0x00,0x60,0xB8 = staddl w0, [x0] # ENC_LDR_32_LDST_REGOFF 0x00,0x08,0x60,0xB8 = staddl w0, [x0] # ENC_LDCLRL_32_MEMOP 0x00,0x10,0x60,0xB8 = ldclrl w0, w0, [x0] # ENC_STCLRL_LDCLRL_32_MEMOP 0x1F,0x10,0x60,0xB8 = stclrl w0, [x0] # ENC_LDEORL_32_MEMOP 0x00,0x20,0x60,0xB8 = ldeorl w0, w0, [x0] # ENC_STEORL_LDEORL_32_MEMOP 0x1F,0x20,0x60,0xB8 = steorl w0, [x0] # ENC_LDSETL_32_MEMOP 0x00,0x30,0x60,0xB8 = ldsetl w0, w0, [x0] # ENC_STSETL_LDSETL_32_MEMOP 0x1F,0x30,0x60,0xB8 = stsetl w0, [x0] # ENC_LDSMAXL_32_MEMOP 0x00,0x40,0x60,0xB8 = ldsmaxl w0, w0, [x0] # ENC_STSMAXL_LDSMAXL_32_MEMOP 0x1F,0x40,0x60,0xB8 = stsmaxl w0, [x0] # ENC_LDSMINL_32_MEMOP 0x00,0x50,0x60,0xB8 = ldsminl w0, w0, [x0] # ENC_STSMINL_LDSMINL_32_MEMOP 0x1F,0x50,0x60,0xB8 = stsminl w0, [x0] # ENC_LDUMAXL_32_MEMOP 0x00,0x60,0x60,0xB8 = ldumaxl w0, w0, [x0] # ENC_STUMAXL_LDUMAXL_32_MEMOP 0x1F,0x60,0x60,0xB8 = stumaxl w0, [x0] # ENC_LDUMINL_32_MEMOP 0x00,0x70,0x60,0xB8 = lduminl w0, w0, [x0] # ENC_STUMINL_LDUMINL_32_MEMOP 0x1F,0x70,0x60,0xB8 = stuminl w0, [x0] # ENC_SWPL_32_MEMOP 0x00,0x80,0x60,0xB8 = swpl w0, w0, [x0] # ENC_LDURSW_64_LDST_UNSCALED 0x00,0x00,0x80,0xB8 = ldursw x0, [x0] # ENC_LDRSW_64_LDST_IMMPOST 0x00,0x04,0x80,0xB8 = ldrsw x0, [x0], #0 # ENC_LDTRSW_64_LDST_UNPRIV 0x00,0x08,0x80,0xB8 = ldtrsw x0, [x0] # ENC_LDRSW_64_LDST_IMMPRE 0x00,0x0C,0x80,0xB8 = ldrsw x0, [x0, #0]! # ENC_LDADDA_32_MEMOP 0x00,0x00,0xA0,0xB8 = ldadda w0, w0, [x0] # ENC_LDRSW_64_LDST_REGOFF 0x00,0x08,0xA0,0xB8 = ldadda w0, w0, [x0] # ENC_LDCLRA_32_MEMOP 0x00,0x10,0xA0,0xB8 = ldclra w0, w0, [x0] # ENC_LDEORA_32_MEMOP 0x00,0x20,0xA0,0xB8 = ldeora w0, w0, [x0] # ENC_LDSETA_32_MEMOP 0x00,0x30,0xA0,0xB8 = ldseta w0, w0, [x0] # ENC_LDSMAXA_32_MEMOP 0x00,0x40,0xA0,0xB8 = ldsmaxa w0, w0, [x0] # ENC_LDSMINA_32_MEMOP 0x00,0x50,0xA0,0xB8 = ldsmina w0, w0, [x0] # ENC_LDUMAXA_32_MEMOP 0x00,0x60,0xA0,0xB8 = ldumaxa w0, w0, [x0] # ENC_LDUMINA_32_MEMOP 0x00,0x70,0xA0,0xB8 = ldumina w0, w0, [x0] # ENC_SWPA_32_MEMOP 0x00,0x80,0xA0,0xB8 = swpa w0, w0, [x0] # ENC_LDAPR_32L_MEMOP 0x00,0xC0,0xBF,0xB8 = ldapr w0, [x0] # ENC_LDADDAL_32_MEMOP 0x00,0x00,0xE0,0xB8 = ldaddal w0, w0, [x0] # ENC_LDCLRAL_32_MEMOP 0x00,0x10,0xE0,0xB8 = ldclral w0, w0, [x0] # ENC_LDEORAL_32_MEMOP 0x00,0x20,0xE0,0xB8 = ldeoral w0, w0, [x0] # ENC_LDSETAL_32_MEMOP 0x00,0x30,0xE0,0xB8 = ldsetal w0, w0, [x0] # ENC_LDSMAXAL_32_MEMOP 0x00,0x40,0xE0,0xB8 = ldsmaxal w0, w0, [x0] # ENC_LDSMINAL_32_MEMOP 0x00,0x50,0xE0,0xB8 = ldsminal w0, w0, [x0] # ENC_LDUMAXAL_32_MEMOP 0x00,0x60,0xE0,0xB8 = ldumaxal w0, w0, [x0] # ENC_LDUMINAL_32_MEMOP 0x00,0x70,0xE0,0xB8 = lduminal w0, w0, [x0] # ENC_SWPAL_32_MEMOP 0x00,0x80,0xE0,0xB8 = swpal w0, w0, [x0] # ENC_STR_32_LDST_POS 0x00,0x00,0x00,0xB9 = str w0, [x0] # ENC_LDR_32_LDST_POS 0x00,0x00,0x40,0xB9 = ldr w0, [x0] # ENC_LDRSW_64_LDST_POS 0x00,0x00,0x80,0xB9 = ldrsw x0, [x0] # ENC_ADCS_64_ADDSUB_CARRY 0x00,0x00,0x00,0xBA = adcs x0, x0, x0 # ENC_RMIF_ONLY_RMIF 0x00,0x04,0x00,0xBA = rmif x0, #0, #0 # ENC_CCMN_64_CONDCMP_REG 0x00,0x00,0x40,0xBA = ccmn x0, x0, #0, eq # ENC_CCMN_64_CONDCMP_IMM 0x00,0x08,0x40,0xBA = ccmn x0, #0, #0, eq # ENC_SUBPS_64S_DP_2SRC 0x00,0x00,0xC0,0xBA = subps x0, x0, x0 # ENC_CMPP_SUBPS_64S_DP_2SRC 0x1F,0x00,0xC0,0xBA = subps xzr, x0, x0 # ENC_STUR_S_LDST_UNSCALED 0x00,0x00,0x00,0xBC = stur s0, [x0] # ENC_STR_S_LDST_IMMPOST 0x00,0x04,0x00,0xBC = str s0, [x0], #0 # ENC_STR_S_LDST_IMMPRE 0x00,0x0C,0x00,0xBC = str s0, [x0, #0]! # ENC_STR_S_LDST_REGOFF 0x00,0x08,0x20,0xBC = str s0, [x0, #0]! # ENC_LDUR_S_LDST_UNSCALED 0x00,0x00,0x40,0xBC = ldur s0, [x0] # ENC_LDR_S_LDST_IMMPOST 0x00,0x04,0x40,0xBC = ldr s0, [x0], #0 # ENC_LDR_S_LDST_IMMPRE 0x00,0x0C,0x40,0xBC = ldr s0, [x0, #0]! # ENC_LDR_S_LDST_REGOFF 0x00,0x08,0x60,0xBC = ldr s0, [x0, #0]! # ENC_STR_S_LDST_POS 0x00,0x00,0x00,0xBD = str s0, [x0] # ENC_LDR_S_LDST_POS 0x00,0x00,0x40,0xBD = ldr s0, [x0] # ENC_LD1SB_Z_P_BZ_D_X32_UNSCALED 0x00,0x00,0x00,0xC4 = ldr s0, [x0] # ENC_LDFF1SB_Z_P_BZ_D_X32_UNSCALED 0x00,0x20,0x00,0xC4 = ldr s0, [x0] # ENC_LD1B_Z_P_BZ_D_X32_UNSCALED 0x00,0x40,0x00,0xC4 = ldr s0, [x0] # ENC_LDFF1B_Z_P_BZ_D_X32_UNSCALED 0x00,0x60,0x00,0xC4 = ldr s0, [x0] # ENC_PRFB_I_P_AI_D 0x00,0xE0,0x00,0xC4 = ldr s0, [x0] # ENC_PRFB_I_P_BZ_D_X32_SCALED 0x00,0x00,0x20,0xC4 = ldr s0, [x0] # ENC_PRFH_I_P_BZ_D_X32_SCALED 0x00,0x20,0x20,0xC4 = ldr s0, [x0] # ENC_PRFW_I_P_BZ_D_X32_SCALED 0x00,0x40,0x20,0xC4 = ldr s0, [x0] # ENC_PRFD_I_P_BZ_D_X32_SCALED 0x00,0x60,0x20,0xC4 = ldr s0, [x0] # ENC_LD1SB_Z_P_AI_D 0x00,0x80,0x20,0xC4 = ldr s0, [x0] # ENC_LDFF1SB_Z_P_AI_D 0x00,0xA0,0x20,0xC4 = ldr s0, [x0] # ENC_LD1B_Z_P_AI_D 0x00,0xC0,0x20,0xC4 = ldr s0, [x0] # ENC_LDFF1B_Z_P_AI_D 0x00,0xE0,0x20,0xC4 = ldr s0, [x0] # ENC_LD1SB_Z_P_BZ_D_64_UNSCALED 0x00,0x80,0x40,0xC4 = ldr s0, [x0] # ENC_LDFF1SB_Z_P_BZ_D_64_UNSCALED 0x00,0xA0,0x40,0xC4 = ldr s0, [x0] # ENC_LD1B_Z_P_BZ_D_64_UNSCALED 0x00,0xC0,0x40,0xC4 = ldr s0, [x0] # ENC_LDFF1B_Z_P_BZ_D_64_UNSCALED 0x00,0xE0,0x40,0xC4 = ldr s0, [x0] # ENC_PRFB_I_P_BZ_D_64_SCALED 0x00,0x80,0x60,0xC4 = ldr s0, [x0] # ENC_PRFH_I_P_BZ_D_64_SCALED 0x00,0xA0,0x60,0xC4 = ldr s0, [x0] # ENC_PRFW_I_P_BZ_D_64_SCALED 0x00,0xC0,0x60,0xC4 = ldr s0, [x0] # ENC_PRFD_I_P_BZ_D_64_SCALED 0x00,0xE0,0x60,0xC4 = ldr s0, [x0] # ENC_LD1SH_Z_P_BZ_D_X32_UNSCALED 0x00,0x00,0x80,0xC4 = ldr s0, [x0] # ENC_LDFF1SH_Z_P_BZ_D_X32_UNSCALED 0x00,0x20,0x80,0xC4 = ldr s0, [x0] # ENC_LD1H_Z_P_BZ_D_X32_UNSCALED 0x00,0x40,0x80,0xC4 = ldr s0, [x0] # ENC_LDFF1H_Z_P_BZ_D_X32_UNSCALED 0x00,0x60,0x80,0xC4 = ldr s0, [x0] # ENC_PRFH_I_P_AI_D 0x00,0xE0,0x80,0xC4 = ldr s0, [x0] # ENC_LD1SH_Z_P_BZ_D_X32_SCALED 0x00,0x00,0xA0,0xC4 = ldr s0, [x0] # ENC_LDFF1SH_Z_P_BZ_D_X32_SCALED 0x00,0x20,0xA0,0xC4 = ldr s0, [x0] # ENC_LD1H_Z_P_BZ_D_X32_SCALED 0x00,0x40,0xA0,0xC4 = ldr s0, [x0] # ENC_LDFF1H_Z_P_BZ_D_X32_SCALED 0x00,0x60,0xA0,0xC4 = ldr s0, [x0] # ENC_LD1SH_Z_P_AI_D 0x00,0x80,0xA0,0xC4 = ldr s0, [x0] # ENC_LDFF1SH_Z_P_AI_D 0x00,0xA0,0xA0,0xC4 = ldr s0, [x0] # ENC_LD1H_Z_P_AI_D 0x00,0xC0,0xA0,0xC4 = ldr s0, [x0] # ENC_LDFF1H_Z_P_AI_D 0x00,0xE0,0xA0,0xC4 = ldr s0, [x0] # ENC_LD1SH_Z_P_BZ_D_64_UNSCALED 0x00,0x80,0xC0,0xC4 = ldr s0, [x0] # ENC_LDFF1SH_Z_P_BZ_D_64_UNSCALED 0x00,0xA0,0xC0,0xC4 = ldr s0, [x0] # ENC_LD1H_Z_P_BZ_D_64_UNSCALED 0x00,0xC0,0xC0,0xC4 = ldr s0, [x0] # ENC_LDFF1H_Z_P_BZ_D_64_UNSCALED 0x00,0xE0,0xC0,0xC4 = ldr s0, [x0] # ENC_LD1SH_Z_P_BZ_D_64_SCALED 0x00,0x80,0xE0,0xC4 = ldr s0, [x0] # ENC_LDFF1SH_Z_P_BZ_D_64_SCALED 0x00,0xA0,0xE0,0xC4 = ldr s0, [x0] # ENC_LD1H_Z_P_BZ_D_64_SCALED 0x00,0xC0,0xE0,0xC4 = ldr s0, [x0] # ENC_LDFF1H_Z_P_BZ_D_64_SCALED 0x00,0xE0,0xE0,0xC4 = ldr s0, [x0] # ENC_LD1SW_Z_P_BZ_D_X32_UNSCALED 0x00,0x00,0x00,0xC5 = ldr s0, [x0] # ENC_LDFF1SW_Z_P_BZ_D_X32_UNSCALED 0x00,0x20,0x00,0xC5 = ldr s0, [x0] # ENC_LD1W_Z_P_BZ_D_X32_UNSCALED 0x00,0x40,0x00,0xC5 = ldr s0, [x0] # ENC_LDFF1W_Z_P_BZ_D_X32_UNSCALED 0x00,0x60,0x00,0xC5 = ldr s0, [x0] # ENC_PRFW_I_P_AI_D 0x00,0xE0,0x00,0xC5 = ldr s0, [x0] # ENC_LD1SW_Z_P_BZ_D_X32_SCALED 0x00,0x00,0x20,0xC5 = ldr s0, [x0] # ENC_LDFF1SW_Z_P_BZ_D_X32_SCALED 0x00,0x20,0x20,0xC5 = ldr s0, [x0] # ENC_LD1W_Z_P_BZ_D_X32_SCALED 0x00,0x40,0x20,0xC5 = ldr s0, [x0] # ENC_LDFF1W_Z_P_BZ_D_X32_SCALED 0x00,0x60,0x20,0xC5 = ldr s0, [x0] # ENC_LD1SW_Z_P_AI_D 0x00,0x80,0x20,0xC5 = ldr s0, [x0] # ENC_LDFF1SW_Z_P_AI_D 0x00,0xA0,0x20,0xC5 = ldr s0, [x0] # ENC_LD1W_Z_P_AI_D 0x00,0xC0,0x20,0xC5 = ldr s0, [x0] # ENC_LDFF1W_Z_P_AI_D 0x00,0xE0,0x20,0xC5 = ldr s0, [x0] # ENC_LD1SW_Z_P_BZ_D_64_UNSCALED 0x00,0x80,0x40,0xC5 = ldr s0, [x0] # ENC_LDFF1SW_Z_P_BZ_D_64_UNSCALED 0x00,0xA0,0x40,0xC5 = ldr s0, [x0] # ENC_LD1W_Z_P_BZ_D_64_UNSCALED 0x00,0xC0,0x40,0xC5 = ldr s0, [x0] # ENC_LDFF1W_Z_P_BZ_D_64_UNSCALED 0x00,0xE0,0x40,0xC5 = ldr s0, [x0] # ENC_LD1SW_Z_P_BZ_D_64_SCALED 0x00,0x80,0x60,0xC5 = ldr s0, [x0] # ENC_LDFF1SW_Z_P_BZ_D_64_SCALED 0x00,0xA0,0x60,0xC5 = ldr s0, [x0] # ENC_LD1W_Z_P_BZ_D_64_SCALED 0x00,0xC0,0x60,0xC5 = ldr s0, [x0] # ENC_LDFF1W_Z_P_BZ_D_64_SCALED 0x00,0xE0,0x60,0xC5 = ldr s0, [x0] # ENC_LD1D_Z_P_BZ_D_X32_UNSCALED 0x00,0x40,0x80,0xC5 = ldr s0, [x0] # ENC_LDFF1D_Z_P_BZ_D_X32_UNSCALED 0x00,0x60,0x80,0xC5 = ldr s0, [x0] # ENC_PRFD_I_P_AI_D 0x00,0xE0,0x80,0xC5 = ldr s0, [x0] # ENC_LD1D_Z_P_BZ_D_X32_SCALED 0x00,0x40,0xA0,0xC5 = ldr s0, [x0] # ENC_LDFF1D_Z_P_BZ_D_X32_SCALED 0x00,0x60,0xA0,0xC5 = ldr s0, [x0] # ENC_LD1D_Z_P_AI_D 0x00,0xC0,0xA0,0xC5 = ldr s0, [x0] # ENC_LDFF1D_Z_P_AI_D 0x00,0xE0,0xA0,0xC5 = ldr s0, [x0] # ENC_LD1D_Z_P_BZ_D_64_UNSCALED 0x00,0xC0,0xC0,0xC5 = ldr s0, [x0] # ENC_LDFF1D_Z_P_BZ_D_64_UNSCALED 0x00,0xE0,0xC0,0xC5 = ldr s0, [x0] # ENC_LD1D_Z_P_BZ_D_64_SCALED 0x00,0xC0,0xE0,0xC5 = ldr s0, [x0] # ENC_LDFF1D_Z_P_BZ_D_64_SCALED 0x00,0xE0,0xE0,0xC5 = ldr s0, [x0] # ENC_STXR_SR64_LDSTEXCL 0x00,0x7C,0x00,0xC8 = stxr w0, x0, [x0] # ENC_STLXR_SR64_LDSTEXCL 0x00,0xFC,0x00,0xC8 = stlxr w0, x0, [x0] # ENC_STXP_SP64_LDSTEXCL 0x00,0x00,0x20,0xC8 = stxp w0, x0, x0, [x0] # ENC_STLXP_SP64_LDSTEXCL 0x00,0x80,0x20,0xC8 = stlxp w0, x0, x0, [x0] # ENC_LDXR_LR64_LDSTEXCL 0x00,0x7C,0x5F,0xC8 = ldxr x0, [x0] # ENC_LDAXR_LR64_LDSTEXCL 0x00,0xFC,0x5F,0xC8 = ldaxr x0, [x0] # ENC_LDXP_LP64_LDSTEXCL 0x00,0x00,0x7F,0xC8 = ldaxr x0, [x0] # ENC_LDAXP_LP64_LDSTEXCL 0x00,0x80,0x7F,0xC8 = ldaxr x0, [x0] # ENC_STLLR_SL64_LDSTEXCL 0x00,0x7C,0x9F,0xC8 = stllr x0, [x0] # ENC_STLR_SL64_LDSTEXCL 0x00,0xFC,0x9F,0xC8 = stlr x0, [x0] # ENC_CAS_C64_LDSTEXCL 0x00,0x7C,0xA0,0xC8 = cas x0, x0, [x0] # ENC_CASL_C64_LDSTEXCL 0x00,0xFC,0xA0,0xC8 = casl x0, x0, [x0] # ENC_LDLAR_LR64_LDSTEXCL 0x00,0x7C,0xDF,0xC8 = ldlar x0, [x0] # ENC_LDAR_LR64_LDSTEXCL 0x00,0xFC,0xDF,0xC8 = ldar x0, [x0] # ENC_CASA_C64_LDSTEXCL 0x00,0x7C,0xE0,0xC8 = casa x0, x0, [x0] # ENC_CASAL_C64_LDSTEXCL 0x00,0xFC,0xE0,0xC8 = casal x0, x0, [x0] # ENC_EOR_64_LOG_SHIFT 0x00,0x00,0x00,0xCA = eor x0, x0, x0 # ENC_EON_64_LOG_SHIFT 0x00,0x00,0x20,0xCA = eon x0, x0, x0 # ENC_SUB_64_ADDSUB_SHIFT 0x00,0x00,0x00,0xCB = sub x0, x0, x0 # ENC_NEG_SUB_64_ADDSUB_SHIFT 0xE0,0x03,0x00,0xCB = neg x0, x0 # ENC_SUB_64_ADDSUB_EXT 0x00,0x00,0x20,0xCB = sub x0, x0, w0, uxtb # ENC_EOR3_VVV16_CRYPTO4 0x00,0x00,0x00,0xCE = eor3 v0.16b, v0.16b, v0.16b, v0.16b # ENC_BCAX_VVV16_CRYPTO4 0x00,0x00,0x20,0xCE = bcax v0.16b, v0.16b, v0.16b, v0.16b # ENC_SM3SS1_VVV4_CRYPTO4 0x00,0x00,0x40,0xCE = sm3ss1 v0.4s, v0.4s, v0.4s, v0.4s # ENC_SM3TT1A_VVV4_CRYPTO3_IMM2 0x00,0x80,0x40,0xCE = sm3tt1a v0.4s, v0.4s, v0.s[0] # ENC_SM3TT1B_VVV4_CRYPTO3_IMM2 0x00,0x84,0x40,0xCE = sm3tt1b v0.4s, v0.4s, v0.s[0] # ENC_SM3TT2A_VVV4_CRYPTO3_IMM2 0x00,0x88,0x40,0xCE = sm3tt2a v0.4s, v0.4s, v0.s[0] # ENC_SM3TT2B_VVV_CRYPTO3_IMM2 0x00,0x8C,0x40,0xCE = sm3tt2b v0.4s, v0.4s, v0.s[0] # ENC_SHA512H_QQV_CRYPTOSHA512_3 0x00,0x80,0x60,0xCE = sha512h q0, q0, v0.2d # ENC_SHA512H2_QQV_CRYPTOSHA512_3 0x00,0x84,0x60,0xCE = sha512h2 q0, q0, v0.2d # ENC_SHA512SU1_VVV2_CRYPTOSHA512_3 0x00,0x88,0x60,0xCE = sha512su1 v0.2d, v0.2d, v0.2d # ENC_RAX1_VVV2_CRYPTOSHA512_3 0x00,0x8C,0x60,0xCE = rax1 v0.2d, v0.2d, v0.2d # ENC_SM3PARTW1_VVV4_CRYPTOSHA512_3 0x00,0xC0,0x60,0xCE = sm3partw1 v0.4s, v0.4s, v0.4s # ENC_SM3PARTW2_VVV4_CRYPTOSHA512_3 0x00,0xC4,0x60,0xCE = sm3partw2 v0.4s, v0.4s, v0.4s # ENC_SM4EKEY_VVV4_CRYPTOSHA512_3 0x00,0xC8,0x60,0xCE = sm4ekey v0.4s, v0.4s, v0.4s # ENC_XAR_VVV2_CRYPTO3_IMM6 0x00,0x00,0x80,0xCE = xar v0.2d, v0.2d, v0.2d, #0 # ENC_SHA512SU0_VV2_CRYPTOSHA512_2 0x00,0x80,0xC0,0xCE = sha512su0 v0.2d, v0.2d # ENC_SM4E_VV4_CRYPTOSHA512_2 0x00,0x84,0xC0,0xCE = sm4e v0.4s, v0.4s # ENC_SUB_64_ADDSUB_IMM 0x00,0x00,0x00,0xD1 = sub x0, x0, #0 # ENC_SUBG_64_ADDSUB_IMMTAGS 0x00,0x00,0x80,0xD1 = subg x0, x0, #0, #0 # ENC_EOR_64_LOG_IMM 0x00,0x00,0x00,0xD2 = eor x0, x0, #0x100000001 # ENC_MOV_MOVZ_64_MOVEWIDE 0x00,0x00,0x80,0xD2 = mov x0, #0 # ENC_MOVZ_64_MOVEWIDE 0x00,0x00,0xA0,0xD2 = movz x0, #0, lsl #16 # ENC_UBFX_UBFM_64M_BITFIELD 0x00,0x00,0x40,0xD3 = ubfx x0, x0, #0, #1 # ENC_LSR_UBFM_64M_BITFIELD 0x00,0xFC,0x40,0xD3 = lsr x0, x0, #0 # ENC_LSL_UBFM_64M_BITFIELD 0x00,0x00,0x41,0xD3 = lsl x0, x0, #63 # ENC_UBFIZ_UBFM_64M_BITFIELD 0x00,0x00,0x42,0xD3 = ubfiz x0, x0, #62, #1 # ENC_SVC_EX_EXCEPTION 0x01,0x00,0x00,0xD4 = svc #0 # ENC_HVC_EX_EXCEPTION 0x02,0x00,0x00,0xD4 = hvc #0 # ENC_SMC_EX_EXCEPTION 0x03,0x00,0x00,0xD4 = smc #0 # ENC_BRK_EX_EXCEPTION 0x00,0x00,0x20,0xD4 = brk #0 # ENC_HLT_EX_EXCEPTION 0x00,0x00,0x40,0xD4 = hlt #0 # ENC_DCPS1_DC_EXCEPTION 0x01,0x00,0xA0,0xD4 = dcps1 # ENC_DCPS2_DC_EXCEPTION 0x02,0x00,0xA0,0xD4 = dcps2 # ENC_DCPS3_DC_EXCEPTION 0x03,0x00,0xA0,0xD4 = dcps3 # ENC_CFINV_M_PSTATE 0x1F,0x40,0x00,0xD5 = cfinv # ENC_XAFLAG_M_PSTATE 0x3F,0x40,0x00,0xD5 = xaflag # ENC_AXFLAG_M_PSTATE 0x5F,0x40,0x00,0xD5 = axflag # ENC_MSR_SI_PSTATE 0x7F,0x40,0x00,0xD5 = msr UAO, #0 # ENC_NOP_HI_HINTS 0x1F,0x20,0x03,0xD5 = nop # ENC_YIELD_HI_HINTS 0x3F,0x20,0x03,0xD5 = yield # ENC_WFE_HI_HINTS 0x5F,0x20,0x03,0xD5 = wfe # ENC_WFI_HI_HINTS 0x7F,0x20,0x03,0xD5 = wfi # ENC_SEV_HI_HINTS 0x9F,0x20,0x03,0xD5 = sev # ENC_SEVL_HI_HINTS 0xBF,0x20,0x03,0xD5 = sevl # ENC_DGH_HI_HINTS 0xDF,0x20,0x03,0xD5 = hint #6 # ENC_XPACLRI_HI_HINTS 0xFF,0x20,0x03,0xD5 = xpaclri # ENC_PACIA1716_HI_HINTS 0x1F,0x21,0x03,0xD5 = pacia1716 # ENC_PACIB1716_HI_HINTS 0x5F,0x21,0x03,0xD5 = pacib1716 # ENC_AUTIA1716_HI_HINTS 0x9F,0x21,0x03,0xD5 = autia1716 # ENC_AUTIB1716_HI_HINTS 0xDF,0x21,0x03,0xD5 = autib1716 # ENC_ESB_HI_HINTS 0x1F,0x22,0x03,0xD5 = esb # ENC_PSB_HC_HINTS 0x3F,0x22,0x03,0xD5 = psb csync # ENC_TSB_HC_HINTS 0x5F,0x22,0x03,0xD5 = tsb csync # ENC_CSDB_HI_HINTS 0x9F,0x22,0x03,0xD5 = csdb # ENC_PACIAZ_HI_HINTS 0x1F,0x23,0x03,0xD5 = paciaz # ENC_PACIASP_HI_HINTS 0x3F,0x23,0x03,0xD5 = paciasp # ENC_PACIBZ_HI_HINTS 0x5F,0x23,0x03,0xD5 = pacibz # ENC_PACIBSP_HI_HINTS 0x7F,0x23,0x03,0xD5 = pacibsp # ENC_AUTIAZ_HI_HINTS 0x9F,0x23,0x03,0xD5 = autiaz # ENC_AUTIASP_HI_HINTS 0xBF,0x23,0x03,0xD5 = autiasp # ENC_AUTIBZ_HI_HINTS 0xDF,0x23,0x03,0xD5 = autibz # ENC_AUTIBSP_HI_HINTS 0xFF,0x23,0x03,0xD5 = autibsp # ENC_BTI_HB_HINTS 0x1F,0x24,0x03,0xD5 = bti # ENC_CLREX_BN_BARRIERS 0x5F,0x30,0x03,0xD5 = clrex #0 # ENC_SSBB_ONLY_BARRIERS 0x9F,0x30,0x03,0xD5 = ssbb # ENC_DMB_BO_BARRIERS 0xBF,0x30,0x03,0xD5 = dmb #0 # ENC_ISB_BI_BARRIERS 0xDF,0x30,0x03,0xD5 = isb #0 # ENC_SB_ONLY_BARRIERS 0xFF,0x30,0x03,0xD5 = sb # ENC_DSB_BO_BARRIERS 0x9F,0x31,0x03,0xD5 = dsb oshld # ENC_PSSBB_ONLY_BARRIERS 0x9F,0x34,0x03,0xD5 = pssbb # ENC_SYS_CR_SYSTEMINSTRS 0x00,0x00,0x08,0xD5 = sys #0, c0, c0, #0, x0 # ENC_IC_SYS_CR_SYSTEMINSTRS 0x00,0x71,0x08,0xD5 = ic ialluis # ENC_DC_SYS_CR_SYSTEMINSTRS 0x20,0x76,0x08,0xD5 = dc ivac, x0 # ENC_AT_SYS_CR_SYSTEMINSTRS 0x00,0x78,0x08,0xD5 = at s1e1r, x0 # ENC_TLBI_SYS_CR_SYSTEMINSTRS 0x00,0x83,0x08,0xD5 = tlbi vmalle1is # ENC_CFP_SYS_CR_SYSTEMINSTRS 0x80,0x73,0x0B,0xD5 = cfp rctx, x0 # ENC_DVP_SYS_CR_SYSTEMINSTRS 0xA0,0x73,0x0B,0xD5 = dvp rctx, x0 # ENC_CPP_SYS_CR_SYSTEMINSTRS 0xE0,0x73,0x0B,0xD5 = cpp rctx, x0 # ENC_MSR_SR_SYSTEMMOVE 0x00,0x00,0x10,0xD5 = msr S2_0_C0_C0_0, x0 # ENC_SYSL_RC_SYSTEMINSTRS 0x00,0x00,0x28,0xD5 = sysl x0, #0, c0, c0, #0 # ENC_MRS_RS_SYSTEMMOVE 0x00,0x00,0x30,0xD5 = mrs x0, S2_0_C0_C0_0 # ENC_BR_64_BRANCH_REG 0x00,0x00,0x1F,0xD6 = br x0 # ENC_BRAAZ_64_BRANCH_REG 0x1F,0x08,0x1F,0xD6 = braaz x0 # ENC_BRABZ_64_BRANCH_REG 0x1F,0x0C,0x1F,0xD6 = brabz x0 # ENC_BLR_64_BRANCH_REG 0x00,0x00,0x3F,0xD6 = blr x0 # ENC_BLRAAZ_64_BRANCH_REG 0x1F,0x08,0x3F,0xD6 = blraaz x0 # ENC_BLRABZ_64_BRANCH_REG 0x1F,0x0C,0x3F,0xD6 = blrabz x0 # ENC_RET_64R_BRANCH_REG 0x00,0x00,0x5F,0xD6 = ret x0 # ENC_RETAA_64E_BRANCH_REG 0xFF,0x0B,0x5F,0xD6 = retaa # ENC_RETAB_64E_BRANCH_REG 0xFF,0x0F,0x5F,0xD6 = retab # ENC_ERET_64E_BRANCH_REG 0xE0,0x03,0x9F,0xD6 = eret # ENC_ERETAA_64E_BRANCH_REG 0xFF,0x0B,0x9F,0xD6 = eretaa # ENC_ERETAB_64E_BRANCH_REG 0xFF,0x0F,0x9F,0xD6 = eretab # ENC_DRPS_64E_BRANCH_REG 0xE0,0x03,0xBF,0xD6 = drps # ENC_BRAA_64P_BRANCH_REG 0x00,0x08,0x1F,0xD7 = braa x0, x0 # ENC_BRAB_64P_BRANCH_REG 0x00,0x0C,0x1F,0xD7 = brab x0, x0 # ENC_BLRAA_64P_BRANCH_REG 0x00,0x08,0x3F,0xD7 = blraa x0, x0 # ENC_BLRAB_64P_BRANCH_REG 0x00,0x0C,0x3F,0xD7 = blrab x0, x0 # ENC_PRFM_P_LOADLIT 0x00,0x00,0x00,0xD8 = prfm pldl1keep, 0x0 # ENC_STLUR_64_LDAPSTL_UNSCALED 0x00,0x00,0x00,0xD9 = stlur x0, [x0] # ENC_STZGM_64BULK_LDSTTAGS 0x00,0x00,0x20,0xD9 = stzgm x0, [x0] # ENC_STG_64SPOST_LDSTTAGS 0x00,0x04,0x20,0xD9 = stg x0, [x0], #0 # ENC_STG_64SOFFSET_LDSTTAGS 0x00,0x08,0x20,0xD9 = stg x0, [x0] # ENC_STG_64SPRE_LDSTTAGS 0x00,0x0C,0x20,0xD9 = stg x0, [x0, #0]! # ENC_LDAPUR_64_LDAPSTL_UNSCALED 0x00,0x00,0x40,0xD9 = ldapur x0, [x0] # ENC_LDG_64LOFFSET_LDSTTAGS 0x00,0x00,0x60,0xD9 = ldg x0, [x0] # ENC_STZG_64SPOST_LDSTTAGS 0x00,0x04,0x60,0xD9 = stzg x0, [x0], #0 # ENC_STZG_64SOFFSET_LDSTTAGS 0x00,0x08,0x60,0xD9 = stzg x0, [x0] # ENC_STZG_64SPRE_LDSTTAGS 0x00,0x0C,0x60,0xD9 = stzg x0, [x0, #0]! # ENC_STGM_64BULK_LDSTTAGS 0x00,0x00,0xA0,0xD9 = stgm x0, [x0] # ENC_ST2G_64SPOST_LDSTTAGS 0x00,0x04,0xA0,0xD9 = st2g x0, [x0], #0 # ENC_ST2G_64SOFFSET_LDSTTAGS 0x00,0x08,0xA0,0xD9 = st2g x0, [x0] # ENC_ST2G_64SPRE_LDSTTAGS 0x00,0x0C,0xA0,0xD9 = st2g x0, [x0, #0]! # ENC_LDGM_64BULK_LDSTTAGS 0x00,0x00,0xE0,0xD9 = ldgm x0, [x0] # ENC_STZ2G_64SPOST_LDSTTAGS 0x00,0x04,0xE0,0xD9 = stz2g x0, [x0], #0 # ENC_STZ2G_64SOFFSET_LDSTTAGS 0x00,0x08,0xE0,0xD9 = stz2g x0, [x0] # ENC_STZ2G_64SPRE_LDSTTAGS 0x00,0x0C,0xE0,0xD9 = stz2g x0, [x0, #0]! # ENC_SBC_64_ADDSUB_CARRY 0x00,0x00,0x00,0xDA = sbc x0, x0, x0 # ENC_NGC_SBC_64_ADDSUB_CARRY 0xE0,0x03,0x00,0xDA = ngc x0, x0 # ENC_CINV_CSINV_64_CONDSEL 0x00,0x00,0x80,0xDA = cinv x0, x0, ne # ENC_CSINV_64_CONDSEL 0x20,0x00,0x80,0xDA = csinv x0, x1, x0, eq # ENC_CNEG_CSNEG_64_CONDSEL 0x00,0x04,0x80,0xDA = cneg x0, x0, ne # ENC_CSNEG_64_CONDSEL 0x20,0x04,0x80,0xDA = csneg x0, x1, x0, eq # ENC_CSETM_CSINV_64_CONDSEL 0xE0,0x03,0x9F,0xDA = csetm x0, ne # ENC_RBIT_64_DP_1SRC 0x00,0x00,0xC0,0xDA = rbit x0, x0 # ENC_REV16_64_DP_1SRC 0x00,0x04,0xC0,0xDA = rev16 x0, x0 # ENC_REV32_64_DP_1SRC 0x00,0x08,0xC0,0xDA = rev32 x0, x0 # ENC_REV_64_DP_1SRC 0x00,0x0C,0xC0,0xDA = rev x0, x0 # ENC_CLZ_64_DP_1SRC 0x00,0x10,0xC0,0xDA = clz x0, x0 # ENC_CLS_64_DP_1SRC 0x00,0x14,0xC0,0xDA = cls x0, x0 # ENC_PACIA_64P_DP_1SRC 0x00,0x00,0xC1,0xDA = pacia x0, x0 # ENC_PACIB_64P_DP_1SRC 0x00,0x04,0xC1,0xDA = pacib x0, x0 # ENC_PACDA_64P_DP_1SRC 0x00,0x08,0xC1,0xDA = pacda x0, x0 # ENC_PACDB_64P_DP_1SRC 0x00,0x0C,0xC1,0xDA = pacdb x0, x0 # ENC_AUTIA_64P_DP_1SRC 0x00,0x10,0xC1,0xDA = autia x0, x0 # ENC_AUTIB_64P_DP_1SRC 0x00,0x14,0xC1,0xDA = autib x0, x0 # ENC_AUTDA_64P_DP_1SRC 0x00,0x18,0xC1,0xDA = autda x0, x0 # ENC_AUTDB_64P_DP_1SRC 0x00,0x1C,0xC1,0xDA = autdb x0, x0 # ENC_PACIZA_64Z_DP_1SRC 0xE0,0x23,0xC1,0xDA = paciza x0 # ENC_PACIZB_64Z_DP_1SRC 0xE0,0x27,0xC1,0xDA = pacizb x0 # ENC_PACDZA_64Z_DP_1SRC 0xE0,0x2B,0xC1,0xDA = pacdza x0 # ENC_PACDZB_64Z_DP_1SRC 0xE0,0x2F,0xC1,0xDA = pacdzb x0 # ENC_AUTIZA_64Z_DP_1SRC 0xE0,0x33,0xC1,0xDA = autiza x0 # ENC_AUTIZB_64Z_DP_1SRC 0xE0,0x37,0xC1,0xDA = autizb x0 # ENC_AUTDZA_64Z_DP_1SRC 0xE0,0x3B,0xC1,0xDA = autdza x0 # ENC_AUTDZB_64Z_DP_1SRC 0xE0,0x3F,0xC1,0xDA = autdzb x0 # ENC_XPACI_64Z_DP_1SRC 0xE0,0x43,0xC1,0xDA = xpaci x0 # ENC_XPACD_64Z_DP_1SRC 0xE0,0x47,0xC1,0xDA = xpacd x0 # ENC_ST1B_Z_P_BR_ 0x00,0x40,0x00,0xE4 = xpacd x0 # ENC_STNT1B_Z_P_BR_CONTIGUOUS 0x00,0x60,0x00,0xE4 = xpacd x0 # ENC_ST1B_Z_P_BZ_D_X32_UNSCALED 0x00,0x80,0x00,0xE4 = xpacd x0 # ENC_ST1B_Z_P_BZ_D_64_UNSCALED 0x00,0xA0,0x00,0xE4 = xpacd x0 # ENC_ST1B_Z_P_BI_ 0x00,0xE0,0x00,0xE4 = xpacd x0 # ENC_STNT1B_Z_P_BI_CONTIGUOUS 0x00,0xE0,0x10,0xE4 = xpacd x0 # ENC_ST2B_Z_P_BR_CONTIGUOUS 0x00,0x60,0x20,0xE4 = xpacd x0 # ENC_ST2B_Z_P_BI_CONTIGUOUS 0x00,0xE0,0x30,0xE4 = xpacd x0 # ENC_ST3B_Z_P_BR_CONTIGUOUS 0x00,0x60,0x40,0xE4 = xpacd x0 # ENC_ST1B_Z_P_BZ_S_X32_UNSCALED 0x00,0x80,0x40,0xE4 = xpacd x0 # ENC_ST1B_Z_P_AI_D 0x00,0xA0,0x40,0xE4 = xpacd x0 # ENC_ST3B_Z_P_BI_CONTIGUOUS 0x00,0xE0,0x50,0xE4 = xpacd x0 # ENC_ST4B_Z_P_BR_CONTIGUOUS 0x00,0x60,0x60,0xE4 = xpacd x0 # ENC_ST1B_Z_P_AI_S 0x00,0xA0,0x60,0xE4 = xpacd x0 # ENC_ST4B_Z_P_BI_CONTIGUOUS 0x00,0xE0,0x70,0xE4 = xpacd x0 # ENC_ST1H_Z_P_BR_ 0x00,0x40,0x80,0xE4 = xpacd x0 # ENC_STNT1H_Z_P_BR_CONTIGUOUS 0x00,0x60,0x80,0xE4 = xpacd x0 # ENC_ST1H_Z_P_BZ_D_X32_UNSCALED 0x00,0x80,0x80,0xE4 = xpacd x0 # ENC_ST1H_Z_P_BZ_D_64_UNSCALED 0x00,0xA0,0x80,0xE4 = xpacd x0 # ENC_ST1H_Z_P_BI_ 0x00,0xE0,0x80,0xE4 = xpacd x0 # ENC_STNT1H_Z_P_BI_CONTIGUOUS 0x00,0xE0,0x90,0xE4 = xpacd x0 # ENC_ST2H_Z_P_BR_CONTIGUOUS 0x00,0x60,0xA0,0xE4 = xpacd x0 # ENC_ST1H_Z_P_BZ_D_X32_SCALED 0x00,0x80,0xA0,0xE4 = xpacd x0 # ENC_ST1H_Z_P_BZ_D_64_SCALED 0x00,0xA0,0xA0,0xE4 = xpacd x0 # ENC_ST2H_Z_P_BI_CONTIGUOUS 0x00,0xE0,0xB0,0xE4 = xpacd x0 # ENC_ST3H_Z_P_BR_CONTIGUOUS 0x00,0x60,0xC0,0xE4 = xpacd x0 # ENC_ST1H_Z_P_BZ_S_X32_UNSCALED 0x00,0x80,0xC0,0xE4 = xpacd x0 # ENC_ST1H_Z_P_AI_D 0x00,0xA0,0xC0,0xE4 = xpacd x0 # ENC_ST3H_Z_P_BI_CONTIGUOUS 0x00,0xE0,0xD0,0xE4 = xpacd x0 # ENC_ST4H_Z_P_BR_CONTIGUOUS 0x00,0x60,0xE0,0xE4 = xpacd x0 # ENC_ST1H_Z_P_BZ_S_X32_SCALED 0x00,0x80,0xE0,0xE4 = xpacd x0 # ENC_ST1H_Z_P_AI_S 0x00,0xA0,0xE0,0xE4 = xpacd x0 # ENC_ST4H_Z_P_BI_CONTIGUOUS 0x00,0xE0,0xF0,0xE4 = xpacd x0 # ENC_ST1W_Z_P_BR_ 0x00,0x40,0x00,0xE5 = xpacd x0 # ENC_STNT1W_Z_P_BR_CONTIGUOUS 0x00,0x60,0x00,0xE5 = xpacd x0 # ENC_ST1W_Z_P_BZ_D_X32_UNSCALED 0x00,0x80,0x00,0xE5 = xpacd x0 # ENC_ST1W_Z_P_BZ_D_64_UNSCALED 0x00,0xA0,0x00,0xE5 = xpacd x0 # ENC_ST1W_Z_P_BI_ 0x00,0xE0,0x00,0xE5 = xpacd x0 # ENC_STNT1W_Z_P_BI_CONTIGUOUS 0x00,0xE0,0x10,0xE5 = xpacd x0 # ENC_ST2W_Z_P_BR_CONTIGUOUS 0x00,0x60,0x20,0xE5 = xpacd x0 # ENC_ST1W_Z_P_BZ_D_X32_SCALED 0x00,0x80,0x20,0xE5 = xpacd x0 # ENC_ST1W_Z_P_BZ_D_64_SCALED 0x00,0xA0,0x20,0xE5 = xpacd x0 # ENC_ST2W_Z_P_BI_CONTIGUOUS 0x00,0xE0,0x30,0xE5 = xpacd x0 # ENC_ST3W_Z_P_BR_CONTIGUOUS 0x00,0x60,0x40,0xE5 = xpacd x0 # ENC_ST1W_Z_P_BZ_S_X32_UNSCALED 0x00,0x80,0x40,0xE5 = xpacd x0 # ENC_ST1W_Z_P_AI_D 0x00,0xA0,0x40,0xE5 = xpacd x0 # ENC_ST3W_Z_P_BI_CONTIGUOUS 0x00,0xE0,0x50,0xE5 = xpacd x0 # ENC_ST4W_Z_P_BR_CONTIGUOUS 0x00,0x60,0x60,0xE5 = xpacd x0 # ENC_ST1W_Z_P_BZ_S_X32_SCALED 0x00,0x80,0x60,0xE5 = xpacd x0 # ENC_ST1W_Z_P_AI_S 0x00,0xA0,0x60,0xE5 = xpacd x0 # ENC_ST4W_Z_P_BI_CONTIGUOUS 0x00,0xE0,0x70,0xE5 = xpacd x0 # ENC_STR_P_BI_ 0x00,0x00,0x80,0xE5 = xpacd x0 # ENC_STR_Z_BI_ 0x00,0x40,0x80,0xE5 = xpacd x0 # ENC_STNT1D_Z_P_BR_CONTIGUOUS 0x00,0x60,0x80,0xE5 = xpacd x0 # ENC_ST1D_Z_P_BZ_D_X32_UNSCALED 0x00,0x80,0x80,0xE5 = xpacd x0 # ENC_ST1D_Z_P_BZ_D_64_UNSCALED 0x00,0xA0,0x80,0xE5 = xpacd x0 # ENC_ST1D_Z_P_BI_ 0x00,0xE0,0x80,0xE5 = xpacd x0 # ENC_STNT1D_Z_P_BI_CONTIGUOUS 0x00,0xE0,0x90,0xE5 = xpacd x0 # ENC_ST2D_Z_P_BR_CONTIGUOUS 0x00,0x60,0xA0,0xE5 = xpacd x0 # ENC_ST1D_Z_P_BZ_D_X32_SCALED 0x00,0x80,0xA0,0xE5 = xpacd x0 # ENC_ST1D_Z_P_BZ_D_64_SCALED 0x00,0xA0,0xA0,0xE5 = xpacd x0 # ENC_ST2D_Z_P_BI_CONTIGUOUS 0x00,0xE0,0xB0,0xE5 = xpacd x0 # ENC_ST3D_Z_P_BR_CONTIGUOUS 0x00,0x60,0xC0,0xE5 = xpacd x0 # ENC_ST1D_Z_P_AI_D 0x00,0xA0,0xC0,0xE5 = xpacd x0 # ENC_ST3D_Z_P_BI_CONTIGUOUS 0x00,0xE0,0xD0,0xE5 = xpacd x0 # ENC_ST1D_Z_P_BR_ 0x00,0x40,0xE0,0xE5 = xpacd x0 # ENC_ST4D_Z_P_BR_CONTIGUOUS 0x00,0x60,0xE0,0xE5 = xpacd x0 # ENC_ST4D_Z_P_BI_CONTIGUOUS 0x00,0xE0,0xF0,0xE5 = xpacd x0 # ENC_ANDS_64_LOG_SHIFT 0x00,0x00,0x00,0xEA = ands x0, x0, x0 # ENC_TST_ANDS_64_LOG_SHIFT 0x1F,0x00,0x00,0xEA = tst x0, x0 # ENC_BICS_64_LOG_SHIFT 0x00,0x00,0x20,0xEA = bics x0, x0, x0 # ENC_SUBS_64_ADDSUB_SHIFT 0x00,0x00,0x00,0xEB = subs x0, x0, x0 # ENC_CMP_SUBS_64_ADDSUB_SHIFT 0x1F,0x00,0x00,0xEB = cmp x0, x0 # ENC_NEGS_SUBS_64_ADDSUB_SHIFT 0xE0,0x03,0x00,0xEB = negs x0, x0 # ENC_SUBS_64S_ADDSUB_EXT 0x00,0x00,0x20,0xEB = subs x0, x0, w0, uxtb # ENC_CMP_SUBS_64S_ADDSUB_EXT 0x1F,0x00,0x20,0xEB = cmp x0, w0, uxtb # ENC_SUBS_64S_ADDSUB_IMM 0x00,0x00,0x00,0xF1 = subs x0, x0, #0 # ENC_CMP_SUBS_64S_ADDSUB_IMM 0x1F,0x00,0x00,0xF1 = cmp x0, #0 # ENC_ANDS_64S_LOG_IMM 0x00,0x00,0x00,0xF2 = ands x0, x0, #0x100000001 # ENC_TST_ANDS_64S_LOG_IMM 0x1F,0x00,0x00,0xF2 = tst x0, #0x100000001 # ENC_MOVK_64_MOVEWIDE 0x00,0x00,0x80,0xF2 = movk x0, #0 # ENC_STUR_64_LDST_UNSCALED 0x00,0x00,0x00,0xF8 = stur x0, [x0] # ENC_STR_64_LDST_IMMPOST 0x00,0x04,0x00,0xF8 = str x0, [x0], #0 # ENC_STTR_64_LDST_UNPRIV 0x00,0x08,0x00,0xF8 = sttr x0, [x0] # ENC_STR_64_LDST_IMMPRE 0x00,0x0C,0x00,0xF8 = str x0, [x0, #0]! # ENC_LDADD_64_MEMOP 0x00,0x00,0x20,0xF8 = ldadd x0, x0, [x0] # ENC_STADD_LDADD_64_MEMOP 0x1F,0x00,0x20,0xF8 = stadd x0, [x0] # ENC_LDRAA_64_LDST_PAC 0x00,0x04,0x20,0xF8 = ldraa x0, [x0] # ENC_STR_64_LDST_REGOFF 0x00,0x08,0x20,0xF8 = ldraa x0, [x0] # ENC_LDRAA_64W_LDST_PAC 0x00,0x0C,0x20,0xF8 = ldraa x0, [x0, #0]! # ENC_LDCLR_64_MEMOP 0x00,0x10,0x20,0xF8 = ldclr x0, x0, [x0] # ENC_STCLR_LDCLR_64_MEMOP 0x1F,0x10,0x20,0xF8 = stclr x0, [x0] # ENC_LDEOR_64_MEMOP 0x00,0x20,0x20,0xF8 = ldeor x0, x0, [x0] # ENC_STEOR_LDEOR_64_MEMOP 0x1F,0x20,0x20,0xF8 = steor x0, [x0] # ENC_LDSET_64_MEMOP 0x00,0x30,0x20,0xF8 = ldset x0, x0, [x0] # ENC_STSET_LDSET_64_MEMOP 0x1F,0x30,0x20,0xF8 = stset x0, [x0] # ENC_LDSMAX_64_MEMOP 0x00,0x40,0x20,0xF8 = ldsmax x0, x0, [x0] # ENC_STSMAX_LDSMAX_64_MEMOP 0x1F,0x40,0x20,0xF8 = stsmax x0, [x0] # ENC_LDSMIN_64_MEMOP 0x00,0x50,0x20,0xF8 = ldsmin x0, x0, [x0] # ENC_STSMIN_LDSMIN_64_MEMOP 0x1F,0x50,0x20,0xF8 = stsmin x0, [x0] # ENC_LDUMAX_64_MEMOP 0x00,0x60,0x20,0xF8 = ldumax x0, x0, [x0] # ENC_STUMAX_LDUMAX_64_MEMOP 0x1F,0x60,0x20,0xF8 = stumax x0, [x0] # ENC_LDUMIN_64_MEMOP 0x00,0x70,0x20,0xF8 = ldumin x0, x0, [x0] # ENC_STUMIN_LDUMIN_64_MEMOP 0x1F,0x70,0x20,0xF8 = stumin x0, [x0] # ENC_SWP_64_MEMOP 0x00,0x80,0x20,0xF8 = swp x0, x0, [x0] # ENC_LDUR_64_LDST_UNSCALED 0x00,0x00,0x40,0xF8 = ldur x0, [x0] # ENC_LDR_64_LDST_IMMPOST 0x00,0x04,0x40,0xF8 = ldur x0, [x0] # ENC_LDTR_64_LDST_UNPRIV 0x00,0x08,0x40,0xF8 = ldur x0, [x0] # ENC_LDR_64_LDST_IMMPRE 0x00,0x0C,0x40,0xF8 = ldur x0, [x0] # ENC_LDADDL_64_MEMOP 0x00,0x00,0x60,0xF8 = ldaddl x0, x0, [x0] # ENC_STADDL_LDADDL_64_MEMOP 0x1F,0x00,0x60,0xF8 = staddl x0, [x0] # ENC_LDR_64_LDST_REGOFF 0x00,0x08,0x60,0xF8 = staddl x0, [x0] # ENC_LDCLRL_64_MEMOP 0x00,0x10,0x60,0xF8 = ldclrl x0, x0, [x0] # ENC_STCLRL_LDCLRL_64_MEMOP 0x1F,0x10,0x60,0xF8 = stclrl x0, [x0] # ENC_LDEORL_64_MEMOP 0x00,0x20,0x60,0xF8 = ldeorl x0, x0, [x0] # ENC_STEORL_LDEORL_64_MEMOP 0x1F,0x20,0x60,0xF8 = steorl x0, [x0] # ENC_LDSETL_64_MEMOP 0x00,0x30,0x60,0xF8 = ldsetl x0, x0, [x0] # ENC_STSETL_LDSETL_64_MEMOP 0x1F,0x30,0x60,0xF8 = stsetl x0, [x0] # ENC_LDSMAXL_64_MEMOP 0x00,0x40,0x60,0xF8 = ldsmaxl x0, x0, [x0] # ENC_STSMAXL_LDSMAXL_64_MEMOP 0x1F,0x40,0x60,0xF8 = stsmaxl x0, [x0] # ENC_LDSMINL_64_MEMOP 0x00,0x50,0x60,0xF8 = ldsminl x0, x0, [x0] # ENC_STSMINL_LDSMINL_64_MEMOP 0x1F,0x50,0x60,0xF8 = stsminl x0, [x0] # ENC_LDUMAXL_64_MEMOP 0x00,0x60,0x60,0xF8 = ldumaxl x0, x0, [x0] # ENC_STUMAXL_LDUMAXL_64_MEMOP 0x1F,0x60,0x60,0xF8 = stumaxl x0, [x0] # ENC_LDUMINL_64_MEMOP 0x00,0x70,0x60,0xF8 = lduminl x0, x0, [x0] # ENC_STUMINL_LDUMINL_64_MEMOP 0x1F,0x70,0x60,0xF8 = stuminl x0, [x0] # ENC_SWPL_64_MEMOP 0x00,0x80,0x60,0xF8 = swpl x0, x0, [x0] # ENC_PRFUM_P_LDST_UNSCALED 0x00,0x00,0x80,0xF8 = prfum pldl1keep, [x0] # ENC_LDADDA_64_MEMOP 0x00,0x00,0xA0,0xF8 = ldadda x0, x0, [x0] # ENC_LDRAB_64_LDST_PAC 0x00,0x04,0xA0,0xF8 = ldrab x0, [x0] # ENC_PRFM_P_LDST_REGOFF 0x00,0x08,0xA0,0xF8 = ldrab x0, [x0] # ENC_LDRAB_64W_LDST_PAC 0x00,0x0C,0xA0,0xF8 = ldrab x0, [x0, #0]! # ENC_LDCLRA_64_MEMOP 0x00,0x10,0xA0,0xF8 = ldclra x0, x0, [x0] # ENC_LDEORA_64_MEMOP 0x00,0x20,0xA0,0xF8 = ldeora x0, x0, [x0] # ENC_LDSETA_64_MEMOP 0x00,0x30,0xA0,0xF8 = ldseta x0, x0, [x0] # ENC_LDSMAXA_64_MEMOP 0x00,0x40,0xA0,0xF8 = ldsmaxa x0, x0, [x0] # ENC_LDSMINA_64_MEMOP 0x00,0x50,0xA0,0xF8 = ldsmina x0, x0, [x0] # ENC_LDUMAXA_64_MEMOP 0x00,0x60,0xA0,0xF8 = ldumaxa x0, x0, [x0] # ENC_LDUMINA_64_MEMOP 0x00,0x70,0xA0,0xF8 = ldumina x0, x0, [x0] # ENC_SWPA_64_MEMOP 0x00,0x80,0xA0,0xF8 = swpa x0, x0, [x0] # ENC_LDAPR_64L_MEMOP 0x00,0xC0,0xBF,0xF8 = ldapr x0, [x0] # ENC_LDADDAL_64_MEMOP 0x00,0x00,0xE0,0xF8 = ldaddal x0, x0, [x0] # ENC_LDCLRAL_64_MEMOP 0x00,0x10,0xE0,0xF8 = ldclral x0, x0, [x0] # ENC_LDEORAL_64_MEMOP 0x00,0x20,0xE0,0xF8 = ldeoral x0, x0, [x0] # ENC_LDSETAL_64_MEMOP 0x00,0x30,0xE0,0xF8 = ldsetal x0, x0, [x0] # ENC_LDSMAXAL_64_MEMOP 0x00,0x40,0xE0,0xF8 = ldsmaxal x0, x0, [x0] # ENC_LDSMINAL_64_MEMOP 0x00,0x50,0xE0,0xF8 = ldsminal x0, x0, [x0] # ENC_LDUMAXAL_64_MEMOP 0x00,0x60,0xE0,0xF8 = ldumaxal x0, x0, [x0] # ENC_LDUMINAL_64_MEMOP 0x00,0x70,0xE0,0xF8 = lduminal x0, x0, [x0] # ENC_SWPAL_64_MEMOP 0x00,0x80,0xE0,0xF8 = swpal x0, x0, [x0] # ENC_STR_64_LDST_POS 0x00,0x00,0x00,0xF9 = str x0, [x0] # ENC_LDR_64_LDST_POS 0x00,0x00,0x40,0xF9 = ldr x0, [x0] # ENC_PRFM_P_LDST_POS 0x00,0x00,0x80,0xF9 = prfm pldl1keep, [x0] # ENC_SBCS_64_ADDSUB_CARRY 0x00,0x00,0x00,0xFA = sbcs x0, x0, x0 # ENC_NGCS_SBCS_64_ADDSUB_CARRY 0xE0,0x03,0x00,0xFA = ngcs x0, x0 # ENC_CCMP_64_CONDCMP_REG 0x00,0x00,0x40,0xFA = ccmp x0, x0, #0, eq # ENC_CCMP_64_CONDCMP_IMM 0x00,0x08,0x40,0xFA = ccmp x0, #0, #0, eq # ENC_STUR_D_LDST_UNSCALED 0x00,0x00,0x00,0xFC = stur d0, [x0] # ENC_STR_D_LDST_IMMPOST 0x00,0x04,0x00,0xFC = str d0, [x0], #0 # ENC_STR_D_LDST_IMMPRE 0x00,0x0C,0x00,0xFC = str d0, [x0, #0]! # ENC_STR_D_LDST_REGOFF 0x00,0x08,0x20,0xFC = str d0, [x0, #0]! # ENC_LDUR_D_LDST_UNSCALED 0x00,0x00,0x40,0xFC = ldur d0, [x0] # ENC_LDR_D_LDST_IMMPOST 0x00,0x04,0x40,0xFC = ldr d0, [x0], #0 # ENC_LDR_D_LDST_IMMPRE 0x00,0x0C,0x40,0xFC = ldr d0, [x0, #0]! # ENC_LDR_D_LDST_REGOFF 0x00,0x08,0x60,0xFC = ldr d0, [x0, #0]! # ENC_STR_D_LDST_POS 0x00,0x00,0x00,0xFD = str d0, [x0] # ENC_LDR_D_LDST_POS 0x00,0x00,0x40,0xFD = ldr d0, [x0]