Splice two vectors under predicate control
Copy the first active to last active elements (inclusive) from the first source vector to the lowest-numbered elements of the result. Then set any remaining elements of the result to a copy of the lowest-numbered elements from the second source vector. The result is placed destructively in the destination and first source vector, or constructively in the destination vector.
It has encodings from 2 classes: Constructive and Destructive
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | size | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | Pg | Zn | Zd | |||||||||||
if !HaveSVE2() then UNDEFINED; integer esize = 8 << UInt(size); integer g = UInt(Pg); integer dst = UInt(Zd); integer s1 = UInt(Zn); integer s2 = (s1 + 1) MOD 32;
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | size | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 0 | 0 | Pg | Zm | Zdn | |||||||||||
if !HaveSVE() then UNDEFINED; integer esize = 8 << UInt(size); integer g = UInt(Pg); integer dst = UInt(Zdn); integer s1 = dst; integer s2 = UInt(Zm);
| <Zd> |
Is the name of the destination scalable vector register, encoded in the "Zd" field. |
| <Zdn> |
Is the name of the first source and destination scalable vector register, encoded in the "Zdn" field. |
| <T> |
Is the size specifier,
encoded in
|
| <Pg> |
Is the name of the governing scalable predicate register P0-P7, encoded in the "Pg" field. |
| <Zn1> |
Is the name of the first scalable vector register of a multi-vector sequence, encoded in the "Zn" field. |
| <Zn2> |
Is the name of the second scalable vector register of a multi-vector sequence, encoded in the "Zn" field. |
| <Zm> |
Is the name of the second source scalable vector register, encoded in the "Zm" field. |
CheckSVEEnabled(); integer elements = VL DIV esize; bits(PL) mask = P[g]; bits(VL) operand1 = if AnyActiveElement(mask, esize) then Z[s1] else Zeros(); bits(VL) operand2 = Z[s2]; bits(VL) result; integer x = 0; boolean active = FALSE; integer lastnum = LastActiveElement(mask, esize); if lastnum >= 0 then for e = 0 to lastnum active = active || ElemP[mask, e, esize] == '1'; if active then Elem[result, x, esize] = Elem[operand1, e, esize]; x = x + 1; elements = elements - x - 1; for e = 0 to elements Elem[result, x, esize] = Elem[operand2, e, esize]; x = x + 1; Z[dst] = result;
This instruction might be immediately preceded in program order by a MOVPRFX instruction. The MOVPRFX instruction must conform to all of the following requirements, otherwise the behavior of the MOVPRFX and this instruction is unpredictable:
Internal version only: isa v32.15, AdvSIMD v29.05, pseudocode v2021-03, sve v2021-03_rc2 ; Build timestamp: 2021-03-30T21:36
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